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[v2,0/3] Add initial support for the Rockchip RK3588 HDMI TX Controller

Message ID 20240801-b4-rk3588-bridge-upstream-v2-0-9fa657a4e15b@collabora.com (mailing list archive)
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Series Add initial support for the Rockchip RK3588 HDMI TX Controller | expand

Message

Cristian Ciocaltea Aug. 1, 2024, 2:25 a.m. UTC
The Rockchip RK3588 SoC family integrates the Synopsys DesignWare HDMI
2.1 Quad-Pixel (QP) TX controller [4], which is a new IP block, quite
different from those used in the previous generations of Rockchip SoCs.

This is the last component that needs to be supported in order to enable
the HDMI output functionality on the RK3588 based SBCs, such as the
RADXA Rock 5B. The other components are the Video Output Processor
(VOP2) and the Samsung IP based HDMI/eDP TX Combo PHY, for which basic
support has been already made available via [1] and [2], respectively.

Please note this is a reworked version of the original series, which
relied on a commonized dw-hdmi approach.  Since the general consensus
was to handle it as an entirely new IP, I dropped all patches related to
the old dw-hdmi and Rockchip glue code - a few of them might still make
sense as general improvements and will be submitted separately.

Additionally, as suggested by Neil, I've sent the reworked bridge driver
as a separate patchset [4], hence this series handles now just the new
Rockchip QP platform driver.

It's worth mentioning the HDMI output support is currently limited to
RGB output up to 4K@60Hz, without audio, CEC or any of the HDMI 2.1
specific features.  Moreover, the VOP2 driver is not able to properly
handle all display modes supported by the connected screens, e.g. it
doesn't cope with non-integer refresh rates.

A possible workaround consists of enabling the display controller to
make use of the clock provided by the HDMI PHY PLL. This is still work
in progress and will be submitted later, as well as the required DTS
updates.

To facilitate testing and experimentation, all HDMI output related
patches, including those part of this series, as well as the bridge
driver, are available at [3].

So far I could only verify this on the RADXA Rock 5B board.

Thanks,
Cristian

[1]: 5a028e8f062f ("drm/rockchip: vop2: Add support for rk3588")
[2]: 553be2830c5f ("phy: rockchip: Add Samsung HDMI/eDP Combo PHY driver")
[3]: https://gitlab.collabora.com/hardware-enablement/rockchip-3588/linux/-/commits/rk3588-hdmi-bridge-v6.11-rc1
[4]: https://lore.kernel.org/lkml/20240801-dw-hdmi-qp-tx-v1-0-148f542de5fd@collabora.com/

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
Changes in v2:
- Reworked the glue code for RK3588 into a new Rockchip platform driver
- Moved bridge driver patches to a separate series [4]
- Dropped all the patches touching to the old dw-hdmi and RK platform
  drivers
- Added connector creation to ensure the HDMI QP bridge driver does only
  support DRM_BRIDGE_ATTACH_NO_CONNECTOR
- Link to v1: https://lore.kernel.org/r/20240601-b4-rk3588-bridge-upstream-v1-0-f6203753232b@collabora.com

---
Cristian Ciocaltea (3):
      dt-bindings: display: rockchip: Add schema for RK3588 HDMI TX Controller
      drm/rockchip: Explicitly include bits header
      drm/rockchip: Add basic RK3588 HDMI output support

 .../display/rockchip/rockchip,dw-hdmi-qp.yaml      | 188 +++++++++
 drivers/gpu/drm/rockchip/Kconfig                   |   8 +
 drivers/gpu/drm/rockchip/Makefile                  |   1 +
 drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c     | 430 +++++++++++++++++++++
 drivers/gpu/drm/rockchip/rockchip_drm_drv.c        |   2 +
 drivers/gpu/drm/rockchip/rockchip_drm_drv.h        |   4 +-
 6 files changed, 632 insertions(+), 1 deletion(-)
---
base-commit: 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0
change-id: 20240601-b4-rk3588-bridge-upstream-a27baff1b8fc

Comments

Piotr Oniszczuk Aug. 3, 2024, 1:24 p.m. UTC | #1
Hi Cristian,

Will you find some time and motivation to add CEC support to Quad-Pixel (QP) TX controller ?

Probably you recall - I added initial CEC support to yours v1 series and i’m stuck with timing issue (cec pulses are 3x too long).
For me it looks like clock issue.
I’m out of ideas how to move forward with this timming issue….
 


> Wiadomość napisana przez Cristian Ciocaltea <cristian.ciocaltea@collabora.com> w dniu 01.08.2024, o godz. 04:25:
> 
> The Rockchip RK3588 SoC family integrates the Synopsys DesignWare HDMI
> 2.1 Quad-Pixel (QP) TX controller [4], which is a new IP block, quite
> different from those used in the previous generations of Rockchip SoCs.
> 
> This is the last component that needs to be supported in order to enable
> the HDMI output functionality on the RK3588 based SBCs, such as the
> RADXA Rock 5B. The other components are the Video Output Processor
> (VOP2) and the Samsung IP based HDMI/eDP TX Combo PHY, for which basic
> support has been already made available via [1] and [2], respectively.
> 
> Please note this is a reworked version of the original series, which
> relied on a commonized dw-hdmi approach.  Since the general consensus
> was to handle it as an entirely new IP, I dropped all patches related to
> the old dw-hdmi and Rockchip glue code - a few of them might still make
> sense as general improvements and will be submitted separately.
> 
> Additionally, as suggested by Neil, I've sent the reworked bridge driver
> as a separate patchset [4], hence this series handles now just the new
> Rockchip QP platform driver.
> 
> It's worth mentioning the HDMI output support is currently limited to
> RGB output up to 4K@60Hz, without audio, CEC or any of the HDMI 2.1
> specific features.  Moreover, the VOP2 driver is not able to properly
> handle all display modes supported by the connected screens, e.g. it
> doesn't cope with non-integer refresh rates.
> 
> A possible workaround consists of enabling the display controller to
> make use of the clock provided by the HDMI PHY PLL. This is still work
> in progress and will be submitted later, as well as the required DTS
> updates.
> 
> To facilitate testing and experimentation, all HDMI output related
> patches, including those part of this series, as well as the bridge
> driver, are available at [3].
> 
> So far I could only verify this on the RADXA Rock 5B board.
> 
> Thanks,
> Cristian
> 
> [1]: 5a028e8f062f ("drm/rockchip: vop2: Add support for rk3588")
> [2]: 553be2830c5f ("phy: rockchip: Add Samsung HDMI/eDP Combo PHY driver")
> [3]: https://gitlab.collabora.com/hardware-enablement/rockchip-3588/linux/-/commits/rk3588-hdmi-bridge-v6.11-rc1
> [4]: https://lore.kernel.org/lkml/20240801-dw-hdmi-qp-tx-v1-0-148f542de5fd@collabora.com/
> 
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
> ---
> Changes in v2:
> - Reworked the glue code for RK3588 into a new Rockchip platform driver
> - Moved bridge driver patches to a separate series [4]
> - Dropped all the patches touching to the old dw-hdmi and RK platform
>  drivers
> - Added connector creation to ensure the HDMI QP bridge driver does only
>  support DRM_BRIDGE_ATTACH_NO_CONNECTOR
> - Link to v1: https://lore.kernel.org/r/20240601-b4-rk3588-bridge-upstream-v1-0-f6203753232b@collabora.com
> 
> ---
> Cristian Ciocaltea (3):
>      dt-bindings: display: rockchip: Add schema for RK3588 HDMI TX Controller
>      drm/rockchip: Explicitly include bits header
>      drm/rockchip: Add basic RK3588 HDMI output support
> 
> .../display/rockchip/rockchip,dw-hdmi-qp.yaml      | 188 +++++++++
> drivers/gpu/drm/rockchip/Kconfig                   |   8 +
> drivers/gpu/drm/rockchip/Makefile                  |   1 +
> drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c     | 430 +++++++++++++++++++++
> drivers/gpu/drm/rockchip/rockchip_drm_drv.c        |   2 +
> drivers/gpu/drm/rockchip/rockchip_drm_drv.h        |   4 +-
> 6 files changed, 632 insertions(+), 1 deletion(-)
> ---
> base-commit: 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0
> change-id: 20240601-b4-rk3588-bridge-upstream-a27baff1b8fc
> 
> 
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip
Chris Morgan Aug. 5, 2024, 4:20 p.m. UTC | #2
On Sat, Aug 03, 2024 at 03:24:06PM +0200, Piotr Oniszczuk wrote:
> Hi Cristian,
> 
> Will you find some time and motivation to add CEC support to Quad-Pixel (QP) TX controller ?
> 
> Probably you recall - I added initial CEC support to yours v1 series and i’m stuck with timing issue (cec pulses are 3x too long).
> For me it looks like clock issue.
> I’m out of ideas how to move forward with this timming issue….

I wonder if using the cec-gpio on "GPIO4 RK_PC1" for the CEC gpio and
"GPIO1 RK_PA5" for the HPD gpio is a possibility? Just a thought.

Chris

>  
> 
> 
> > Wiadomość napisana przez Cristian Ciocaltea <cristian.ciocaltea@collabora.com> w dniu 01.08.2024, o godz. 04:25:
> > 
> > The Rockchip RK3588 SoC family integrates the Synopsys DesignWare HDMI
> > 2.1 Quad-Pixel (QP) TX controller [4], which is a new IP block, quite
> > different from those used in the previous generations of Rockchip SoCs.
> > 
> > This is the last component that needs to be supported in order to enable
> > the HDMI output functionality on the RK3588 based SBCs, such as the
> > RADXA Rock 5B. The other components are the Video Output Processor
> > (VOP2) and the Samsung IP based HDMI/eDP TX Combo PHY, for which basic
> > support has been already made available via [1] and [2], respectively.
> > 
> > Please note this is a reworked version of the original series, which
> > relied on a commonized dw-hdmi approach.  Since the general consensus
> > was to handle it as an entirely new IP, I dropped all patches related to
> > the old dw-hdmi and Rockchip glue code - a few of them might still make
> > sense as general improvements and will be submitted separately.
> > 
> > Additionally, as suggested by Neil, I've sent the reworked bridge driver
> > as a separate patchset [4], hence this series handles now just the new
> > Rockchip QP platform driver.
> > 
> > It's worth mentioning the HDMI output support is currently limited to
> > RGB output up to 4K@60Hz, without audio, CEC or any of the HDMI 2.1
> > specific features.  Moreover, the VOP2 driver is not able to properly
> > handle all display modes supported by the connected screens, e.g. it
> > doesn't cope with non-integer refresh rates.
> > 
> > A possible workaround consists of enabling the display controller to
> > make use of the clock provided by the HDMI PHY PLL. This is still work
> > in progress and will be submitted later, as well as the required DTS
> > updates.
> > 
> > To facilitate testing and experimentation, all HDMI output related
> > patches, including those part of this series, as well as the bridge
> > driver, are available at [3].
> > 
> > So far I could only verify this on the RADXA Rock 5B board.
> > 
> > Thanks,
> > Cristian
> > 
> > [1]: 5a028e8f062f ("drm/rockchip: vop2: Add support for rk3588")
> > [2]: 553be2830c5f ("phy: rockchip: Add Samsung HDMI/eDP Combo PHY driver")
> > [3]: https://gitlab.collabora.com/hardware-enablement/rockchip-3588/linux/-/commits/rk3588-hdmi-bridge-v6.11-rc1
> > [4]: https://lore.kernel.org/lkml/20240801-dw-hdmi-qp-tx-v1-0-148f542de5fd@collabora.com/
> > 
> > Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
> > ---
> > Changes in v2:
> > - Reworked the glue code for RK3588 into a new Rockchip platform driver
> > - Moved bridge driver patches to a separate series [4]
> > - Dropped all the patches touching to the old dw-hdmi and RK platform
> >  drivers
> > - Added connector creation to ensure the HDMI QP bridge driver does only
> >  support DRM_BRIDGE_ATTACH_NO_CONNECTOR
> > - Link to v1: https://lore.kernel.org/r/20240601-b4-rk3588-bridge-upstream-v1-0-f6203753232b@collabora.com
> > 
> > ---
> > Cristian Ciocaltea (3):
> >      dt-bindings: display: rockchip: Add schema for RK3588 HDMI TX Controller
> >      drm/rockchip: Explicitly include bits header
> >      drm/rockchip: Add basic RK3588 HDMI output support
> > 
> > .../display/rockchip/rockchip,dw-hdmi-qp.yaml      | 188 +++++++++
> > drivers/gpu/drm/rockchip/Kconfig                   |   8 +
> > drivers/gpu/drm/rockchip/Makefile                  |   1 +
> > drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c     | 430 +++++++++++++++++++++
> > drivers/gpu/drm/rockchip/rockchip_drm_drv.c        |   2 +
> > drivers/gpu/drm/rockchip/rockchip_drm_drv.h        |   4 +-
> > 6 files changed, 632 insertions(+), 1 deletion(-)
> > ---
> > base-commit: 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0
> > change-id: 20240601-b4-rk3588-bridge-upstream-a27baff1b8fc
> > 
> > 
> > _______________________________________________
> > Linux-rockchip mailing list
> > Linux-rockchip@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-rockchip
> 
>
Piotr Oniszczuk Aug. 5, 2024, 4:31 p.m. UTC | #3
> Wiadomość napisana przez Chris Morgan <macroalpha82@gmail.com> w dniu 05.08.2024, o godz. 18:20:
> 
> On Sat, Aug 03, 2024 at 03:24:06PM +0200, Piotr Oniszczuk wrote:
>> Hi Cristian,
>> 
>> Will you find some time and motivation to add CEC support to Quad-Pixel (QP) TX controller ?
>> 
>> Probably you recall - I added initial CEC support to yours v1 series and i’m stuck with timing issue (cec pulses are 3x too long).
>> For me it looks like clock issue.
>> I’m out of ideas how to move forward with this timming issue….
> 
> I wonder if using the cec-gpio on "GPIO4 RK_PC1" for the CEC gpio and
> "GPIO1 RK_PA5" for the HPD gpio is a possibility? Just a thought.
> 
> Chris

Chris,
Oscilloscope shows pulses on cec line - issue is that cec pulses observed on oscilloscope have timings 2,9 times longer that should be (start bit is 10,7mS instead of 3.6; zero is 4.4 instead 1.5 while one is 1,7 instead of 0.6).
Pulses durations seems to be „proportional" (start; zero; one) - all are almost exact 2.9x too long. 
For me this sounds like wrong clock issue.
I can try switch to gpio outs - but I think better is to first make sure that cec clock is set ok.
Im not sure what is best way to do such cec clock check...   
 
> 
>> 
>> 
>> 
>>> Wiadomość napisana przez Cristian Ciocaltea <cristian.ciocaltea@collabora.com> w dniu 01.08.2024, o godz. 04:25:
>>> 
>>> The Rockchip RK3588 SoC family integrates the Synopsys DesignWare HDMI
>>> 2.1 Quad-Pixel (QP) TX controller [4], which is a new IP block, quite
>>> different from those used in the previous generations of Rockchip SoCs.
>>> 
>>> This is the last component that needs to be supported in order to enable
>>> the HDMI output functionality on the RK3588 based SBCs, such as the
>>> RADXA Rock 5B. The other components are the Video Output Processor
>>> (VOP2) and the Samsung IP based HDMI/eDP TX Combo PHY, for which basic
>>> support has been already made available via [1] and [2], respectively.
>>> 
>>> Please note this is a reworked version of the original series, which
>>> relied on a commonized dw-hdmi approach.  Since the general consensus
>>> was to handle it as an entirely new IP, I dropped all patches related to
>>> the old dw-hdmi and Rockchip glue code - a few of them might still make
>>> sense as general improvements and will be submitted separately.
>>> 
>>> Additionally, as suggested by Neil, I've sent the reworked bridge driver
>>> as a separate patchset [4], hence this series handles now just the new
>>> Rockchip QP platform driver.
>>> 
>>> It's worth mentioning the HDMI output support is currently limited to
>>> RGB output up to 4K@60Hz, without audio, CEC or any of the HDMI 2.1
>>> specific features.  Moreover, the VOP2 driver is not able to properly
>>> handle all display modes supported by the connected screens, e.g. it
>>> doesn't cope with non-integer refresh rates.
>>> 
>>> A possible workaround consists of enabling the display controller to
>>> make use of the clock provided by the HDMI PHY PLL. This is still work
>>> in progress and will be submitted later, as well as the required DTS
>>> updates.
>>> 
>>> To facilitate testing and experimentation, all HDMI output related
>>> patches, including those part of this series, as well as the bridge
>>> driver, are available at [3].
>>> 
>>> So far I could only verify this on the RADXA Rock 5B board.
>>> 
>>> Thanks,
>>> Cristian
>>> 
>>> [1]: 5a028e8f062f ("drm/rockchip: vop2: Add support for rk3588")
>>> [2]: 553be2830c5f ("phy: rockchip: Add Samsung HDMI/eDP Combo PHY driver")
>>> [3]: https://gitlab.collabora.com/hardware-enablement/rockchip-3588/linux/-/commits/rk3588-hdmi-bridge-v6.11-rc1
>>> [4]: https://lore.kernel.org/lkml/20240801-dw-hdmi-qp-tx-v1-0-148f542de5fd@collabora.com/
>>> 
>>> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
>>> ---
>>> Changes in v2:
>>> - Reworked the glue code for RK3588 into a new Rockchip platform driver
>>> - Moved bridge driver patches to a separate series [4]
>>> - Dropped all the patches touching to the old dw-hdmi and RK platform
>>> drivers
>>> - Added connector creation to ensure the HDMI QP bridge driver does only
>>> support DRM_BRIDGE_ATTACH_NO_CONNECTOR
>>> - Link to v1: https://lore.kernel.org/r/20240601-b4-rk3588-bridge-upstream-v1-0-f6203753232b@collabora.com
>>> 
>>> ---
>>> Cristian Ciocaltea (3):
>>>     dt-bindings: display: rockchip: Add schema for RK3588 HDMI TX Controller
>>>     drm/rockchip: Explicitly include bits header
>>>     drm/rockchip: Add basic RK3588 HDMI output support
>>> 
>>> .../display/rockchip/rockchip,dw-hdmi-qp.yaml      | 188 +++++++++
>>> drivers/gpu/drm/rockchip/Kconfig                   |   8 +
>>> drivers/gpu/drm/rockchip/Makefile                  |   1 +
>>> drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c     | 430 +++++++++++++++++++++
>>> drivers/gpu/drm/rockchip/rockchip_drm_drv.c        |   2 +
>>> drivers/gpu/drm/rockchip/rockchip_drm_drv.h        |   4 +-
>>> 6 files changed, 632 insertions(+), 1 deletion(-)
>>> ---
>>> base-commit: 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0
>>> change-id: 20240601-b4-rk3588-bridge-upstream-a27baff1b8fc
>>> 
>>> 
>>> _______________________________________________
>>> Linux-rockchip mailing list
>>> Linux-rockchip@lists.infradead.org
>>> http://lists.infradead.org/mailman/listinfo/linux-rockchip
>> 
>>