| Message ID | 20240807-b4-rk3588-bridge-upstream-v3-0-60d6bab0dc7c@collabora.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Add initial support for the Rockchip RK3588 HDMI TX Controller | expand |
Am Mittwoch, 7. August 2024, 13:07:22 CEST schrieb Cristian Ciocaltea: > The Rockchip RK3588 SoC family integrates the Synopsys DesignWare HDMI > 2.1 Quad-Pixel (QP) TX controller, which is a new IP block, quite > different from those used in the previous generations of Rockchip SoCs. > > The controller supports the following features, among others: > > * Fixed Rate Link (FRL) > * Display Stream Compression (DSC) > * 4K@120Hz and 8K@60Hz video modes > * Variable Refresh Rate (VRR) including Quick Media Switching (QMS) > * Fast Vactive (FVA) > * SCDC I2C DDC access > * Multi-stream audio > * Enhanced Audio Return Channel (EARC) > > This is the last component that needs to be supported in order to enable > the HDMI output functionality on the RK3588 based SBCs, such as the > RADXA Rock 5B. The other components are the Video Output Processor > (VOP2) and the Samsung IP based HDMI/eDP TX Combo PHY, for which basic > support has been already made available via [1] and [2], respectively. > > Please note this is a reworked version of the original series, which > relied on a commonized dw-hdmi approach. Since the general consensus > was to handle it as an entirely new IP, I dropped all patches related to > the old dw-hdmi and Rockchip glue code - a few of them might still make > sense as general improvements and will be submitted separately. > > It's worth mentioning the HDMI output support is currently limited to > RGB output up to 4K@60Hz, without audio, CEC or any of the HDMI 2.1 > specific features. Moreover, the VOP2 driver is not able to properly > handle all display modes supported by the connected screens, e.g. it > doesn't cope with non-integer refresh rates. > > A possible workaround consists of enabling the display controller to > make use of the clock provided by the HDMI PHY PLL. This is still work > in progress and will be submitted later, as well as the required DTS > updates. > > To facilitate testing and experimentation, all HDMI output related > patches, including those part of this series, are available at [3]. > > So far I could only verify this on the RADXA Rock 5B board. On a rk3588-tiger-haikou (including its DSI hat and my preliminary DSI driver) it also works. Even with both DSI and HDMI at the same time. Both hdmi plugged in on boot and also plugging it in during runtime of the board, generates a clean image on my 1080p display. So, series Tested-by: Heiko Stuebner <heiko@sntech.de>
On 8/13/24 4:17 PM, Heiko Stübner wrote: > Am Mittwoch, 7. August 2024, 13:07:22 CEST schrieb Cristian Ciocaltea: >> The Rockchip RK3588 SoC family integrates the Synopsys DesignWare HDMI >> 2.1 Quad-Pixel (QP) TX controller, which is a new IP block, quite >> different from those used in the previous generations of Rockchip SoCs. >> >> The controller supports the following features, among others: >> >> * Fixed Rate Link (FRL) >> * Display Stream Compression (DSC) >> * 4K@120Hz and 8K@60Hz video modes >> * Variable Refresh Rate (VRR) including Quick Media Switching (QMS) >> * Fast Vactive (FVA) >> * SCDC I2C DDC access >> * Multi-stream audio >> * Enhanced Audio Return Channel (EARC) >> >> This is the last component that needs to be supported in order to enable >> the HDMI output functionality on the RK3588 based SBCs, such as the >> RADXA Rock 5B. The other components are the Video Output Processor >> (VOP2) and the Samsung IP based HDMI/eDP TX Combo PHY, for which basic >> support has been already made available via [1] and [2], respectively. >> >> Please note this is a reworked version of the original series, which >> relied on a commonized dw-hdmi approach. Since the general consensus >> was to handle it as an entirely new IP, I dropped all patches related to >> the old dw-hdmi and Rockchip glue code - a few of them might still make >> sense as general improvements and will be submitted separately. >> >> It's worth mentioning the HDMI output support is currently limited to >> RGB output up to 4K@60Hz, without audio, CEC or any of the HDMI 2.1 >> specific features. Moreover, the VOP2 driver is not able to properly >> handle all display modes supported by the connected screens, e.g. it >> doesn't cope with non-integer refresh rates. >> >> A possible workaround consists of enabling the display controller to >> make use of the clock provided by the HDMI PHY PLL. This is still work >> in progress and will be submitted later, as well as the required DTS >> updates. >> >> To facilitate testing and experimentation, all HDMI output related >> patches, including those part of this series, are available at [3]. >> >> So far I could only verify this on the RADXA Rock 5B board. > > On a rk3588-tiger-haikou (including its DSI hat and my preliminary DSI > driver) it also works. > > Even with both DSI and HDMI at the same time. Both hdmi plugged in on > boot and also plugging it in during runtime of the board, generates a > clean image on my 1080p display. > > So, series > Tested-by: Heiko Stuebner <heiko@sntech.de> Thanks for checking this out! Regards, Cristian
On Wed, 07 Aug 2024 14:07:22 +0300, Cristian Ciocaltea wrote: > The Rockchip RK3588 SoC family integrates the Synopsys DesignWare HDMI > 2.1 Quad-Pixel (QP) TX controller, which is a new IP block, quite > different from those used in the previous generations of Rockchip SoCs. > > The controller supports the following features, among others: > > * Fixed Rate Link (FRL) > * Display Stream Compression (DSC) > * 4K@120Hz and 8K@60Hz video modes > * Variable Refresh Rate (VRR) including Quick Media Switching (QMS) > * Fast Vactive (FVA) > * SCDC I2C DDC access > * Multi-stream audio > * Enhanced Audio Return Channel (EARC) > > [...] Applied, thanks! [4/5] drm/rockchip: Explicitly include bits header commit: ab03974df27e471ff03402265292f1bafafb5df6 Best regards,
The Rockchip RK3588 SoC family integrates the Synopsys DesignWare HDMI 2.1 Quad-Pixel (QP) TX controller, which is a new IP block, quite different from those used in the previous generations of Rockchip SoCs. The controller supports the following features, among others: * Fixed Rate Link (FRL) * Display Stream Compression (DSC) * 4K@120Hz and 8K@60Hz video modes * Variable Refresh Rate (VRR) including Quick Media Switching (QMS) * Fast Vactive (FVA) * SCDC I2C DDC access * Multi-stream audio * Enhanced Audio Return Channel (EARC) This is the last component that needs to be supported in order to enable the HDMI output functionality on the RK3588 based SBCs, such as the RADXA Rock 5B. The other components are the Video Output Processor (VOP2) and the Samsung IP based HDMI/eDP TX Combo PHY, for which basic support has been already made available via [1] and [2], respectively. Please note this is a reworked version of the original series, which relied on a commonized dw-hdmi approach. Since the general consensus was to handle it as an entirely new IP, I dropped all patches related to the old dw-hdmi and Rockchip glue code - a few of them might still make sense as general improvements and will be submitted separately. It's worth mentioning the HDMI output support is currently limited to RGB output up to 4K@60Hz, without audio, CEC or any of the HDMI 2.1 specific features. Moreover, the VOP2 driver is not able to properly handle all display modes supported by the connected screens, e.g. it doesn't cope with non-integer refresh rates. A possible workaround consists of enabling the display controller to make use of the clock provided by the HDMI PHY PLL. This is still work in progress and will be submitted later, as well as the required DTS updates. To facilitate testing and experimentation, all HDMI output related patches, including those part of this series, are available at [3]. So far I could only verify this on the RADXA Rock 5B board. Thanks, Cristian [1]: 5a028e8f062f ("drm/rockchip: vop2: Add support for rk3588") [2]: 553be2830c5f ("phy: rockchip: Add Samsung HDMI/eDP Combo PHY driver") [3]: https://gitlab.collabora.com/hardware-enablement/rockchip-3588/linux/-/commits/rk3588-hdmi-bridge-v6.11-rc1 [4]: https://lore.kernel.org/lkml/20240801-dw-hdmi-qp-tx-v1-0-148f542de5fd@collabora.com/ Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> --- Changes in v3: - Reintegrated bridge patchset [4] to allow automated testing and simplify reviewing (Krzysztof); the after-split changes were: * Made use of the new bridge HDMI helpers indicated by Dmitry * Dropped connector creation to ensure driver does only support DRM_BRIDGE_ATTACH_NO_CONNECTOR * Updated I2C segment handling to properly handle connected DVI displays (reported and fixed by Heiko) - Updated schema for DW HDMI QP TX IP providing some hardware details - Updated patch for DW HDMI QP TX Controller module referring to a support library instead of a platform driver (Krzysztof) - Drop empty dw_hdmi_qp_unbind() export from the library and related usage from RK platform driver - Drop Fixes tag from "drm/rockchip: Explicitly include bits header" patch (Krzysztof) - Link to v2: https://lore.kernel.org/r/20240801-b4-rk3588-bridge-upstream-v2-0-9fa657a4e15b@collabora.com Changes in v2: - Reworked the glue code for RK3588 into a new Rockchip platform driver - Moved bridge driver patches to a separate series [4] - Dropped all the patches touching to the old dw-hdmi and RK platform drivers - Added connector creation to ensure the HDMI QP bridge driver does only support DRM_BRIDGE_ATTACH_NO_CONNECTOR - Link to v1: https://lore.kernel.org/r/20240601-b4-rk3588-bridge-upstream-v1-0-f6203753232b@collabora.com --- Cristian Ciocaltea (5): dt-bindings: display: bridge: Add schema for Synopsys DW HDMI QP TX IP drm/bridge: synopsys: Add DW HDMI QP TX Controller support library dt-bindings: display: rockchip: Add schema for RK3588 HDMI TX Controller drm/rockchip: Explicitly include bits header drm/rockchip: Add basic RK3588 HDMI output support .../display/bridge/synopsys,dw-hdmi-qp.yaml | 72 ++ .../display/rockchip/rockchip,dw-hdmi-qp.yaml | 188 +++++ drivers/gpu/drm/bridge/synopsys/Kconfig | 8 + drivers/gpu/drm/bridge/synopsys/Makefile | 2 + drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c | 742 ++++++++++++++++++ drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.h | 834 +++++++++++++++++++++ drivers/gpu/drm/rockchip/Kconfig | 8 + drivers/gpu/drm/rockchip/Makefile | 1 + drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c | 429 +++++++++++ drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 2 + drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 4 +- include/drm/bridge/dw_hdmi_qp.h | 36 + 12 files changed, 2325 insertions(+), 1 deletion(-) --- base-commit: 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0 change-id: 20240601-b4-rk3588-bridge-upstream-a27baff1b8fc