From patchwork Fri Oct 10 21:26:07 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kever Yang X-Patchwork-Id: 5067571 Return-Path: X-Original-To: patchwork-linux-rockchip@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 98CE19F295 for ; Fri, 10 Oct 2014 21:27:38 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C13992017D for ; Fri, 10 Oct 2014 21:27:37 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0C65020176 for ; Fri, 10 Oct 2014 21:27:37 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Xchiq-0002Pw-IE; Fri, 10 Oct 2014 21:27:36 +0000 Received: from mail-pa0-x22c.google.com ([2607:f8b0:400e:c03::22c]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Xchi3-00023c-0n; Fri, 10 Oct 2014 21:26:48 +0000 Received: by mail-pa0-f44.google.com with SMTP id et14so2478255pad.31 for ; Fri, 10 Oct 2014 14:26:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=T3s3wI5qgFKbpJ8RV9J9lXbQgbYCf+EUOgpgOyKRoO8=; b=nWJhdks5NX8xyATt2oGLb3mOX4+Papm5hV7RiGGquj5B3EjjHf6XJ/j+44vg8ET9NS 6mc/HYsVutSVROV6XNLcfwK/B63g3LWWMMfkXwdMI+mud7vKno81nrDf/ys9+dVW1wmR CKGRCXDNra7ooavEfJ9Obx/gSnTNe9iuGvjvLd4BM4PcoVkCMioVg+ozghd2W23cDoHz zrKhS5tY+RuAGtolzoT/59PoODZWc/xGx8PwbFpvorDDk1gz117PA+vAB1zkxkw2SIA1 QlOol1FwcXM7rjafEz5MjxAxt77T7a2eWAZBbM+1JielBTgu/4I13PFArk/Sd8ZwxfNI z8Ug== X-Received: by 10.70.90.171 with SMTP id bx11mr7857246pdb.27.1412976386167; Fri, 10 Oct 2014 14:26:26 -0700 (PDT) Received: from kever-X240.corp.google.com (dhcp-172-22-52-129.mtv.corp.google.com [172.22.52.129]) by mx.google.com with ESMTPSA id qp9sm4373709pbc.31.2014.10.10.14.26.25 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 10 Oct 2014 14:26:25 -0700 (PDT) From: Kever Yang To: heiko@sntech.de Subject: [PATCH v3 3/6] ARM: rockchip: add option to access the pmu via a phandle in smp_operations Date: Fri, 10 Oct 2014 14:26:07 -0700 Message-Id: <1412976370-14468-4-git-send-email-kever.yang@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1412976370-14468-1-git-send-email-kever.yang@rock-chips.com> References: <1412976370-14468-1-git-send-email-kever.yang@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141010_142647_111530_C10F1AD0 X-CRM114-Status: GOOD ( 12.04 ) X-Spam-Score: 0.0 (/) Cc: huangtao@rock-chips.com, addy.ke@rock-chips.com, Russell King , linux-kernel@vger.kernel.org, dianders@chromium.org, Kever Yang , linux-rockchip@lists.infradead.org, xjq@rock-chips.com, cf@rock-chips.com, hj@rock-chips.com, sonnyrao@chromium.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_NONE,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Makes it possible to define a rockchip,pmu phandle in the cpus node directly referencing the pmu syscon instead of searching for specific compatible. The old way of finding the pmu stays of course available. Signed-off-by: Heiko Stuebner Signed-off-by: Kever Yang --- Changes in v3: - add this patch Changes in v2: None arch/arm/mach-rockchip/platsmp.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c index 4c36fbf..57b53b3 100644 --- a/arch/arm/mach-rockchip/platsmp.c +++ b/arch/arm/mach-rockchip/platsmp.c @@ -155,6 +155,19 @@ static int __init rockchip_smp_prepare_pmu(void) struct device_node *node; void __iomem *pmu_base; + /* + * This function is only called via smp_ops->smp_prepare_cpu(). + * That only happens if a "/cpus" device tree node exists + * and has an "enable-method" property that selects the SMP + * operations defined herein. + */ + node = of_find_node_by_path("/cpus"); + + pmu = syscon_regmap_lookup_by_phandle(node, "rockchip,pmu"); + of_node_put(node); + if (!IS_ERR(pmu)) + return 0; + pmu = syscon_regmap_lookup_by_compatible("rockchip,rk3066-pmu"); if (!IS_ERR(pmu)) return 0;