Message ID | 1416900743-29204-4-git-send-email-zyw@rock-chips.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Chris, On Mon, Nov 24, 2014 at 11:32 PM, Chris Zhong <zyw@rock-chips.com> wrote: > add pmu sram node for suspend, add global_pwroff pinctrl. > The pmu sram is used to store the resume code. > global_pwroff is held low level at work, it would be pull to high > when entering suspend. reference this in the board DTS file since > some boards need it. > > Signed-off-by: Tony Xie <xxx@rock-chips.com> > Signed-off-by: Chris Zhong <zyw@rock-chips.com> > Reviewed-by: Doug Anderson <dianders@chromium.org> > Tested-by: Doug Anderson <dianders@chromium.org> > > --- > > Changes in v9: None This is untrue. v8 had more stuff than v9. See: https://patchwork.kernel.org/patch/5311621/ vs. https://patchwork.kernel.org/patch/5372911/ I prefer v8.
On 12/01/2014 01:26 PM, Doug Anderson wrote: > Chris, > > On Mon, Nov 24, 2014 at 11:32 PM, Chris Zhong <zyw@rock-chips.com> wrote: >> add pmu sram node for suspend, add global_pwroff pinctrl. >> The pmu sram is used to store the resume code. >> global_pwroff is held low level at work, it would be pull to high >> when entering suspend. reference this in the board DTS file since >> some boards need it. >> >> Signed-off-by: Tony Xie <xxx@rock-chips.com> >> Signed-off-by: Chris Zhong <zyw@rock-chips.com> >> Reviewed-by: Doug Anderson <dianders@chromium.org> >> Tested-by: Doug Anderson <dianders@chromium.org> >> >> --- >> >> Changes in v9: None > This is untrue. v8 had more stuff than v9. See: > > https://patchwork.kernel.org/patch/5311621/ > > vs. > > https://patchwork.kernel.org/patch/5372911/ > > I prefer v8. > > > Ah, I missed the ddr pinctrl in V9, Thank you. I have modified it, and post the V10.
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index d83ca93..c11b44c 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -481,6 +481,11 @@ }; }; + sram@ff720000 { + compatible = "rockchip,rk3288-pmu-sram", "mmio-sram"; + reg = <0xff720000 0x1000>; + }; + pmu: power-management@ff730000 { compatible = "rockchip,rk3288-pmu", "syscon"; reg = <0xff730000 0x100>; @@ -704,6 +709,12 @@ bias-disable; }; + sleep { + global_pwroff: global-pwroff { + rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + i2c0 { i2c0_xfer: i2c0-xfer { rockchip,pins = <0 15 RK_FUNC_1 &pcfg_pull_none>,