From patchwork Fri Dec 5 06:31:09 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Yan X-Patchwork-Id: 5442311 Return-Path: X-Original-To: patchwork-linux-rockchip@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 49097BEEA8 for ; Fri, 5 Dec 2014 06:32:11 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 82AEC2035D for ; Fri, 5 Dec 2014 06:32:10 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A75242035C for ; Fri, 5 Dec 2014 06:32:09 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XwmQz-00052S-7s; Fri, 05 Dec 2014 06:32:09 +0000 Received: from lucky1.263xmail.com ([211.157.147.130]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XwmQw-0004zm-Kp for linux-rockchip@lists.infradead.org; Fri, 05 Dec 2014 06:32:07 +0000 Received: from andy.yan?rock-chips.com (unknown [192.168.167.157]) by lucky1.263xmail.com (Postfix) with SMTP id CCBF719A0B6; Fri, 5 Dec 2014 14:31:42 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.263.net (Postfix) with ESMTP id 397C31BC9C; Fri, 5 Dec 2014 14:31:28 +0800 (CST) X-RL-SENDER: andy.yan@rock-chips.com X-FST-TO: airlied@linux.ie X-SENDER-IP: 127.0.0.1 X-LOGIN-NAME: andy.yan@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-SENDER: yxj@rock-chips.com X-DNS-TYPE: 0 Received: from localhost.localdomain (unknown [127.0.0.1]) by smtp.263.net (Postfix) whith ESMTP id 93395DCIEA; Fri, 05 Dec 2014 14:31:37 +0800 (CST) From: Andy Yan To: airlied@linux.ie, Philipp Zabel , heiko@sntech.de, fabio.estevam@freescale.com, rmk+kernel@arm.linux.org.uk Subject: [PATCH v18 09/12] drm: bridge/dw_hdmi: clear i2cmphy_stat0 reg in hdmi_phy_wait_i2c_done Date: Fri, 5 Dec 2014 14:31:09 +0800 Message-Id: <1417761069-17287-1-git-send-email-andy.yan@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1417760564-16858-1-git-send-email-andy.yan@rock-chips.com> References: <1417760564-16858-1-git-send-email-andy.yan@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141204_223206_999137_D712601E X-CRM114-Status: UNSURE ( 6.16 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.0 (/) Cc: Mark Rutland , dri-devel@lists.freedesktop.org, ykk@rock-chips.com, devel@driverdev.osuosl.org, Arnd Bergmann , linux-rockchip@lists.infradead.org, Grant Likely , Dave Airlie , jay.xu@rock-chips.com, devicetree@vger.kernel.org, Zubair.Kakakhel@imgtec.com, Pawel Moll , Ian Campbell , Inki Dae , Rob Herring , Sean Paul , mark.yao@rock-chips.com, Josh Boyer , Greg Kroah-Hartman , linux-kernel@vger.kernel.org, djkurtz@google.com, Kumar Gala , Andy Yan , Shawn Guo , vladimir_zapolskiy@mentor.com, Lucas Stach X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_LOW, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP HDMI_IH_I2CMPHY_STAT0 is a clear on write register, which indicates i2cm operation status(i2c transfer done or error), every hdmi phy register configuration must check this register to make sure the configuration has complete. But the indication bit should be cleared after check, otherwise the corresponding bit will hold on forever, this may give a wrong signal for next check. Signed-off-by: Andy Yan --- Changes in v18: None Changes in v17: None Changes in v16: None Changes in v15: None Changes in v14: None Changes in v13: None Changes in v12: None Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: None Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None drivers/gpu/drm/bridge/dw_hdmi.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/dw_hdmi.c b/drivers/gpu/drm/bridge/dw_hdmi.c index d5bec0c..2264ec1 100644 --- a/drivers/gpu/drm/bridge/dw_hdmi.c +++ b/drivers/gpu/drm/bridge/dw_hdmi.c @@ -666,11 +666,15 @@ static inline void hdmi_phy_test_dout(struct dw_hdmi *hdmi, static bool hdmi_phy_wait_i2c_done(struct dw_hdmi *hdmi, int msec) { - while ((hdmi_readb(hdmi, HDMI_IH_I2CMPHY_STAT0) & 0x3) == 0) { + u32 val; + + while ((val = hdmi_readb(hdmi, HDMI_IH_I2CMPHY_STAT0) & 0x3) == 0) { if (msec-- == 0) return false; udelay(1000); } + hdmi_writeb(hdmi, val, HDMI_IH_I2CMPHY_STAT0); + return true; }