From patchwork Sun Jun 14 05:13:39 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caesar Wang X-Patchwork-Id: 6603721 Return-Path: X-Original-To: patchwork-linux-rockchip@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id C13459F3A0 for ; Sun, 14 Jun 2015 05:15:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DDD9D206DB for ; Sun, 14 Jun 2015 05:15:34 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 58FDB206E3 for ; Sun, 14 Jun 2015 05:15:33 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z40Ga-0007ND-KG; Sun, 14 Jun 2015 05:15:32 +0000 Received: from mail-pa0-f48.google.com ([209.85.220.48]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z40GK-0005t8-PY; Sun, 14 Jun 2015 05:15:17 +0000 Received: by pacgb13 with SMTP id gb13so14933156pac.1; Sat, 13 Jun 2015 22:14:54 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=9cbwCG85u3UH8Ati1GHRlwpf4WtQvnMdoXkzKF74mHI=; b=lmip/6X0iviQJD/HQbVG+u2NY8LliTJ9gLIvGnK3eVUvwo765U9BwU4YUiuHKLi3LO J8/t/xdeqCx+xJuc1VpkIdWyOZs77dlRr5zm6wXg99xK+XYcisJdlG6D3fho3hw+CbVa IvJXEMjmzUVFO3WX5iZ0Z8IgTuwmjn5ynKd8lGNdolHy9fI1o8jMBzch2mouCxus32eL 3SohQM5BQwZlC/oUnWDmpN/SVvIFBs7ItY3IBIZ8JPK4bLKT4srmApiXYfR/TaHZGhMg 39Mtfm831TZfNKsNa8Whul176mLpssIKLprMoiHRYZ0zv2aqPO5F06KCFX4ueQ7G0t6W J9AA== X-Received: by 10.68.139.225 with SMTP id rb1mr36357221pbb.68.1434258894535; Sat, 13 Jun 2015 22:14:54 -0700 (PDT) Received: from localhost.localdomain ([103.47.144.47]) by mx.google.com with ESMTPSA id pe3sm8184849pdb.55.2015.06.13.22.14.45 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 13 Jun 2015 22:14:53 -0700 (PDT) From: Caesar Wang To: heiko@sntech.de, khilman@linaro.org Subject: [PATCH v15 4/4] ARM: dts: add RK3288 power-domain node Date: Sun, 14 Jun 2015 13:13:39 +0800 Message-Id: <1434258820-26779-5-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1434258820-26779-1-git-send-email-wxt@rock-chips.com> References: <1434258820-26779-1-git-send-email-wxt@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150613_221516_955044_793AC562 X-CRM114-Status: UNSURE ( 9.38 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.8 (-) Cc: Mark Rutland , devicetree@vger.kernel.org, ulf.hansson@linaro.org, Russell King , Pawel Moll , Ian Campbell , "jinkun.hong" , dmitry.torokhov@gmail.com, linux-kernel@vger.kernel.org, tomasz.figa@gmail.com, dianders@chromium.org, linux-rockchip@lists.infradead.org, Rob Herring , Kumar Gala , linux-arm-kernel@lists.infradead.org, Caesar Wang X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch add the needed clocks into power-controller. There are several reasons as follows: Firstly, the clocks need be turned off to save power when the system enter the suspend state. So we need to enumerate the clocks in the dts. In order to power domain can turn on and off. Secondly, the reset-circuit should reset be synchronous on rk3288, then sync revoked. So we need to enable clocks of all devices. Signed-off-by: jinkun.hong Signed-off-by: Caesar Wang --- Changes in v15: - As Tomasz remarked previously the dts should represent the hardware and the power-domains are part of the pmu. Series-changes: 12 - Remove essential clocks from rk3288 PD_VIO domain, Some clocks are essential for the system health and should not be turned down. However there is no owner for them so if they listed as belonging to power domain we'll try toggling them up and down during power domain transition. As a result we either fail to suspend or resume the system. Series-changes: 10 - fix missing the #include . - remove the notes. Series-changes: 9 - add decription for power-doamin node. Series-changes: 8 - DTS go back to v2. Series-changes: 3 - Decomposition power-controller, changed to multiple controller (gpu-power-controller, hevc-power-controller). Series-changes: 2 - make pd_vio clocks all one entry per line and alphabetize. - power: power-controller move back to pinctrl: pinctrl. Changes in v9: None arch/arm/boot/dts/rk3288.dtsi | 62 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 165968d..8224070 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -550,6 +550,68 @@ pmu: power-management@ff730000 { compatible = "rockchip,rk3288-pmu", "syscon"; reg = <0xff730000 0x100>; + + pmu: power-management@ff730000 { + compatible = "rockchip,rk3288-pmu", "syscon", "simple-mfd"; + reg = <0xff730000 0x100>; + + power: power-controller { + compatible = "rockchip,rk3288-power-controller"; + #power-domain-cells = <1>; + rockchip,pmu = <&pmu>; + #address-cells = <1>; + #size-cells = <0>; + + pd_gpu { + reg = ; + clocks = <&cru ACLK_GPU>; + }; + + pd_hevc { + reg = ; + clocks = <&cru ACLK_HEVC>, + <&cru SCLK_HEVC_CABAC>, + <&cru SCLK_HEVC_CORE>, + <&cru HCLK_HEVC>; + }; + + pd_vio { + reg = ; + clocks = <&cru ACLK_IEP>, + <&cru ACLK_ISP>, + <&cru ACLK_RGA>, + <&cru ACLK_VIP>, + <&cru ACLK_VOP0>, + <&cru ACLK_VOP1>, + <&cru DCLK_VOP0>, + <&cru DCLK_VOP1>, + <&cru HCLK_IEP>, + <&cru HCLK_ISP>, + <&cru HCLK_RGA>, + <&cru HCLK_VIP>, + <&cru HCLK_VOP0>, + <&cru HCLK_VOP1>, + <&cru PCLK_EDP_CTRL>, + <&cru PCLK_HDMI_CTRL>, + <&cru PCLK_LVDS_PHY>, + <&cru PCLK_MIPI_CSI>, + <&cru PCLK_MIPI_DSI0>, + <&cru PCLK_MIPI_DSI1>, + <&cru SCLK_EDP_24M>, + <&cru SCLK_EDP>, + <&cru SCLK_HDMI_CEC>, + <&cru SCLK_HDMI_HDCP>, + <&cru SCLK_ISP_JPE>, + <&cru SCLK_ISP>, + <&cru SCLK_RGA>; + }; + + pd_video { + reg = ; + clocks = <&cru ACLK_VCODEC>, + <&cru HCLK_VCODEC>; + }; + }; }; sgrf: syscon@ff740000 {