From patchwork Fri Oct 23 01:54:54 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caesar Wang X-Patchwork-Id: 7469371 Return-Path: X-Original-To: patchwork-linux-rockchip@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id AD1F3BEEA4 for ; Fri, 23 Oct 2015 01:56:13 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A83A52055C for ; Fri, 23 Oct 2015 01:56:09 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 98EAB204E4 for ; Fri, 23 Oct 2015 01:56:05 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZpRaP-0004lr-6K; Fri, 23 Oct 2015 01:56:05 +0000 Received: from mail-pa0-f66.google.com ([209.85.220.66]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZpRa6-0004WH-GB; Fri, 23 Oct 2015 01:55:50 +0000 Received: by pacik9 with SMTP id ik9so10824915pac.3; Thu, 22 Oct 2015 18:55:25 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=sM6DF7MN5fjmGHBT5L715w049eK12OxulYXtFesaMho=; b=RvpljsU3liInDhN5whgpk2dPwvKlipAK/r/NRbXmONbRTg3Nz0PAwn3osLeW4VikA0 fOj9DDb/zeoFpxMMBwj6/IiNnW8hvaaer63zW3Q9TvpAkzEXTly2fF5fi5dvKkgyLA2h uwKP9w2+HTJ9rJ/Yd9kB9CvkYqUxfb9zIFqksTsBWqaIbHdwF0KqcN116Ukmq+q2ILp5 ohSv2aZUGmjIU5DQpESdW6S6Kn/yt6v8m3ktWIeICmB87Zgk3yRD9Sr3uxA6xl54PIiE 8gUUvWd0E1H4MFuNrHAYRh2MFpbUG8c9ttGhHXbew9rCojCQbLt03MJh7iJ1mnmMOm/Z b0iA== X-Received: by 10.68.57.205 with SMTP id k13mr8844133pbq.4.1445565325922; Thu, 22 Oct 2015 18:55:25 -0700 (PDT) Received: from localhost.localdomain ([43.226.228.195]) by smtp.gmail.com with ESMTPSA id w8sm15967438pbs.87.2015.10.22.18.55.17 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 22 Oct 2015 18:55:25 -0700 (PDT) From: Caesar Wang To: Heiko Stuebner Subject: [PATCH v3 1/3] dt-bindings: rockchip-thermal: Add the pinctrl states in this document Date: Fri, 23 Oct 2015 09:54:54 +0800 Message-Id: <1445565296-31517-2-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1445565296-31517-1-git-send-email-wxt@rock-chips.com> References: <1445565296-31517-1-git-send-email-wxt@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151022_185546_579807_A9CF3F11 X-CRM114-Status: GOOD ( 13.72 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Ian Campbell , Pawel Moll , linux-pm@vger.kernel.org, Dmitry Torokhov , dianders@chromium.org, linux-kernel@vger.kernel.org, Eduardo Valentin , linux-rockchip@lists.infradead.org, Rob Herring , Kumar Gala , Zhang Rui , linux-arm-kernel@lists.infradead.org, Caesar Wang MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The "init" pinctrl is defined we'll set pinctrl to this state before probe and then "default" after probe. Add the "init" and "sleep" pinctrl as the OTP gpio state, since we need switch the pin to gpio state before the TSADC controller is reset. AFAIK, the TSADC controller is reset, the tshut polarity will be a *low* signal in a short period of time for some devices. Says: The TSADC get the temperature on rockchip thermal. If T(current temperature) < (setting temperature), the OTP output the *high* signal. If T(current temperature) > (setting temperature), the OTP output the *low* Signal. In some cases, the OTP pin is connected to the PMIC, maybe the PMIC can accept the reset response time to avoid this issue. In other words, the system will be always reboot if we make the OTP pin is connected the others IC to control the power. Signed-off-by: Caesar Wang Reviewed-by: Douglas Anderson --- Changes in v3: - Add the pictrl states decription in document. Changes in v2: - Add the 'init' pinctrl more decription in commit. - Fix the subject to make more obvious in PATCH[1/2] - Resend this patch v2 since fix the subject to be specific. Changes in v1: - As the Doug comments, add the 'init' property to sync document. .../devicetree/bindings/thermal/rockchip-thermal.txt | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt index ef802de..b38200d 100644 --- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt @@ -12,6 +12,11 @@ Required properties: - resets : Must contain an entry for each entry in reset-names. See ../reset/reset.txt for details. - reset-names : Must include the name "tsadc-apb". +- pinctrl-names : The pin control state names; +- pinctrl-0 : The "init" pinctrl state, it will be set before device probe. +- pinctrl-1 : The "default" pinctrl state, it will be set after reset the + TSADC controller. +- pinctrl-2 : The "sleep" pinctrl state, it will be in for suspend. - #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. - rockchip,hw-tshut-temp : The hardware-controlled shutdown temperature value. - rockchip,hw-tshut-mode : The hardware-controlled shutdown mode 0:CRU 1:GPIO. @@ -27,8 +32,10 @@ tsadc: tsadc@ff280000 { clock-names = "tsadc", "apb_pclk"; resets = <&cru SRST_TSADC>; reset-names = "tsadc-apb"; - pinctrl-names = "default"; - pinctrl-0 = <&otp_out>; + pinctrl-names = "init", "default", "sleep"; + pinctrl-0 = <&otp_gpio>; + pinctrl-1 = <&otp_out>; + pinctrl-2 = <&otp_gpio>; #thermal-sensor-cells = <1>; rockchip,hw-tshut-temp = <95000>; rockchip,hw-tshut-mode = <0>;