From patchwork Tue Nov 10 09:35:31 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Zhong X-Patchwork-Id: 7589231 Return-Path: X-Original-To: patchwork-linux-rockchip@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 88E109F392 for ; Tue, 10 Nov 2015 10:18:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 91CB8206E7 for ; Tue, 10 Nov 2015 10:18:58 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BEA142060C for ; Tue, 10 Nov 2015 10:18:57 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Zw60u-0006zo-Jv; Tue, 10 Nov 2015 10:18:56 +0000 Received: from mail-pa0-f54.google.com ([209.85.220.54]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Zw5M5-0006b2-30; Tue, 10 Nov 2015 09:36:45 +0000 Received: by pasz6 with SMTP id z6so236581363pas.2; Tue, 10 Nov 2015 01:35:48 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id; bh=B0UocwsxOBWliLKUWWZoOkeoZZSm9ESriXHp1JB/uQ4=; b=ip8VERdGeUfcCTMmn0b24LEDFj/uU2lMpaj5mAD/VcHzcdQmwun0WrD8zSzsofJiy1 t/Jxx2dlFWONt3gyyAWFNSEBGSuJJVKiE+IvAIwH3ubkzhjBw18a3CZXBtjCzdJ08Wzv DyXWSrRsY4iPPIxlDUgDVXVvTeGniL1cD8bj4/aAB1xb++SA70tVezknDhdosaVvGtGH kE6/VgGbhXSP94uxdP4GKGyVGz1L9xbX1Txgo6AuVYu+tRJOhvGkgawNoARuZtgBpzc6 npKhm0UfxCjZNaylryNvgf9+1JvCSCuxsHJh2IdpDFwmwCKoqEtBcKiQ9zsogI00Y1PV /t+A== X-Received: by 10.68.242.105 with SMTP id wp9mr4089006pbc.49.1447148148909; Tue, 10 Nov 2015 01:35:48 -0800 (PST) Received: from localhost.localdomain ([43.226.228.135]) by smtp.gmail.com with ESMTPSA id ck9sm2986187pad.28.2015.11.10.01.35.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 10 Nov 2015 01:35:47 -0800 (PST) From: Chris Zhong To: dianders@chromium.org Subject: [PATCH] clk: rockchip: switch PLLs to slow mode before reboot for rk3288 Date: Tue, 10 Nov 2015 17:35:31 +0800 Message-Id: <1447148131-30041-1-git-send-email-zyw@rock-chips.com> X-Mailer: git-send-email 2.6.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151110_013645_165007_834FA8D2 X-CRM114-Status: GOOD ( 12.34 ) X-Spam-Score: -2.4 (--) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Heiko Stuebner , Michael Turquette , Stephen Boyd , linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Chris Zhong , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We've been seeing some crashes at reboot test on rk3288-based systems, which boards have not reset pin connected to NPOR, they reboot by setting 0xfdb9 to RK3288_GLB_SRST_FST register. If the APLL works in a high frequency mode, some IPs might hang during soft reset. It appears that we can fix the problem by switching to slow mode before reboot, just like what we did before suspend. Signed-off-by: Chris Zhong --- drivers/clk/rockchip/clk-rk3288.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c index 9040878..524662c 100644 --- a/drivers/clk/rockchip/clk-rk3288.c +++ b/drivers/clk/rockchip/clk-rk3288.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include "clk.h" @@ -855,6 +856,34 @@ static void rk3288_clk_sleep_init(void __iomem *reg_base) static void rk3288_clk_sleep_init(void __iomem *reg_base) {} #endif +void __iomem *mode_con_reg; +static int rk3288_restart_notify(struct notifier_block *this, + unsigned long mode, void *cmd) +{ + writel(0xf3030000, mode_con_reg); + return NOTIFY_DONE; +} + +static struct notifier_block rk3288_restart_handler = { + .notifier_call = rk3288_restart_notify, + /* Switch PLLs other than DPLL (for SDRAM) to slow mode before reboot + * to avoid crashes in reset, so this priority must bigger than the one + * in rockchip_restart_handler. + */ + .priority = 129, +}; + +void __init rk3288_register_restart_notifier(void __iomem *reg) +{ + int ret; + + mode_con_reg = reg; + ret = register_restart_handler(&rk3288_restart_handler); + if (ret) + pr_err("%s: cannot register restart handler, %d\n", + __func__, ret); +} + static void __init rk3288_clk_init(struct device_node *np) { void __iomem *reg_base; @@ -910,6 +939,8 @@ static void __init rk3288_clk_init(struct device_node *np) rockchip_register_softrst(np, 12, reg_base + RK3288_SOFTRST_CON(0), ROCKCHIP_SOFTRST_HIWORD_MASK); + rk3288_register_restart_notifier(reg_base + RK3288_MODE_CON); + rockchip_register_restart_notifier(RK3288_GLB_SRST_FST); rk3288_clk_sleep_init(reg_base); }