From patchwork Fri Nov 20 08:15:33 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Zhong X-Patchwork-Id: 7665361 Return-Path: X-Original-To: patchwork-linux-rockchip@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id BB1EFBF90C for ; Fri, 20 Nov 2015 08:18:10 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 85EF8203AE for ; Fri, 20 Nov 2015 08:18:09 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5389620497 for ; Fri, 20 Nov 2015 08:18:08 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZzgtT-00035H-R4; Fri, 20 Nov 2015 08:18:07 +0000 Received: from mail-ig0-f196.google.com ([209.85.213.196]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Zzgsm-0002aq-9E; Fri, 20 Nov 2015 08:17:53 +0000 Received: by igbgg5 with SMTP id gg5so810660igb.2; Fri, 20 Nov 2015 00:17:03 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=EgrlemjMgRco0UVbnMEBE0bYQP+EzANsVlfUTVTuEjo=; b=TLFd/zUroUohet6cjXN8MSko+nZP5/C+PwVXe4weWTJJJ4nh+nBjZ7UY23b0pQBtpv 7+CPAPK1LGViEd7pPENzs0PIun5Eg4NYPJHqsXg7SuG2e+uK3txvkZz4wqCx9I42zCTJ 3RiPfw4yKehQ9aZSp9xKJ29YV7NDEglhINMb7EhJzOgm/vgPLTVt2fj01NLBlhRZqXAH SmOTdn58k6NAZWqBXhmmyNTxvHg5Uv6Xgolb+9MYje5LHvtXZMXqvtoXPlGDBgXf+JAR ghOTEGBnHS3fi8enSeo0zy++6Rmj0Wf23cxkGoVoAzKYsBPbpTLdPuKf1CBCH+qCePO5 gwew== X-Received: by 10.50.66.197 with SMTP id h5mr556393igt.82.1448007423633; Fri, 20 Nov 2015 00:17:03 -0800 (PST) Received: from localhost.localdomain ([45.74.60.24]) by smtp.gmail.com with ESMTPSA id b10sm696026igx.19.2015.11.20.00.16.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 20 Nov 2015 00:17:02 -0800 (PST) From: Chris Zhong To: heiko@sntech.de, linux-rockchip@lists.infradead.org, mark.yao@rock-chips.com, treding@nvidia.com, emil.l.velikov@gmail.com Subject: [PATCH v4 07/13] drm: rockchip: Support Synopsys DesignWare MIPI DSI host controller Date: Fri, 20 Nov 2015 16:15:33 +0800 Message-Id: <1448007339-10966-8-git-send-email-zyw@rock-chips.com> X-Mailer: git-send-email 2.6.3 In-Reply-To: <1448007339-10966-1-git-send-email-zyw@rock-chips.com> References: <1448007339-10966-1-git-send-email-zyw@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151120_001724_695999_AE2A45A0 X-CRM114-Status: GOOD ( 18.64 ) X-Spam-Score: -2.2 (--) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: airlied@linux.ie, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Chris Zhong , rmk+kernel@arm.linux.org.uk, ajaykumar.rs@samsung.com, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add support for Synopsys DesignWare MIPI DSI host controller which is embedded in the rk3288 SoCs. Signed-off-by: Chris Zhong --- Changes in v4: None Changes in v3: None Changes in v2: None drivers/gpu/drm/rockchip/Kconfig | 10 + drivers/gpu/drm/rockchip/Makefile | 1 + drivers/gpu/drm/rockchip/dw_mipi_dsi_rockchip.c | 249 ++++++++++++++++++++++++ drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 3 + 4 files changed, 263 insertions(+) create mode 100644 drivers/gpu/drm/rockchip/dw_mipi_dsi_rockchip.c diff --git a/drivers/gpu/drm/rockchip/Kconfig b/drivers/gpu/drm/rockchip/Kconfig index 35215f6..24395f3 100644 --- a/drivers/gpu/drm/rockchip/Kconfig +++ b/drivers/gpu/drm/rockchip/Kconfig @@ -25,3 +25,13 @@ config ROCKCHIP_DW_HDMI for the Synopsys DesignWare HDMI driver. If you want to enable HDMI on RK3288 based SoC, you should selet this option. + +config ROCKCHIP_DW_MIPI_DSI + bool "Rockchip specific extensions for Synopsys DW MIPI DSI" + depends on DRM_ROCKCHIP + select DRM_DW_MIPI_DSI + help + This selects support for Rockchip SoC specific extensions + for the Synopsys DesignWare HDMI driver. If you want to + enable MIPI DSI on RK3288 based SoC, you should selet this + option. diff --git a/drivers/gpu/drm/rockchip/Makefile b/drivers/gpu/drm/rockchip/Makefile index f3d8a19..6a97059 100644 --- a/drivers/gpu/drm/rockchip/Makefile +++ b/drivers/gpu/drm/rockchip/Makefile @@ -6,5 +6,6 @@ rockchipdrm-y := rockchip_drm_drv.o rockchip_drm_fb.o rockchip_drm_fbdev.o \ rockchip_drm_gem.o obj-$(CONFIG_ROCKCHIP_DW_HDMI) += dw_hdmi-rockchip.o +obj-$(CONFIG_ROCKCHIP_DW_MIPI_DSI) += dw_mipi_dsi_rockchip.o obj-$(CONFIG_DRM_ROCKCHIP) += rockchipdrm.o rockchip_drm_vop.o diff --git a/drivers/gpu/drm/rockchip/dw_mipi_dsi_rockchip.c b/drivers/gpu/drm/rockchip/dw_mipi_dsi_rockchip.c new file mode 100644 index 0000000..a0bb4eb --- /dev/null +++ b/drivers/gpu/drm/rockchip/dw_mipi_dsi_rockchip.c @@ -0,0 +1,249 @@ +/* + * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "rockchip_drm_drv.h" +#include "rockchip_drm_vop.h" + +#define DRIVER_NAME "rockchip-mipi-dsi" + +#define GRF_SOC_CON6 0x025c +#define DSI0_SEL_VOP_LIT (1 << 6) +#define DSI1_SEL_VOP_LIT (1 << 9) + +struct rockchip_mipi_dsi { + struct drm_encoder encoder; + struct device *dev; + struct regmap *regmap; +}; + +static inline struct rockchip_mipi_dsi *enc_to_dsi(struct drm_encoder *enc) +{ + return container_of(enc, struct rockchip_mipi_dsi, encoder); +} + +static struct drm_encoder_funcs rockchip_mipi_dsi_encoder_funcs = { + .destroy = drm_encoder_cleanup, +}; + +static int rockchip_mipi_parse_dt(struct rockchip_mipi_dsi *dsi) +{ + struct device_node *np = dsi->dev->of_node; + + dsi->regmap = syscon_regmap_lookup_by_phandle(np, "rockchip,grf"); + if (IS_ERR(dsi->regmap)) { + dev_err(dsi->dev, "Unable to get rockchip,grf\n"); + return PTR_ERR(dsi->regmap); + } + + return 0; +} + +static bool rockchip_mipi_dsi_encoder_mode_fixup(struct drm_encoder *encoder, + const struct drm_display_mode *mode, + struct drm_display_mode *adjusted_mode) +{ + return true; +} + +static void rockchip_mipi_dsi_encoder_prepare(struct drm_encoder *encoder) +{ + u32 encoder_pix_fmt, interface_pix_fmt; + + encoder_pix_fmt = dw_mipi_dsi_get_encoder_pixel_format(encoder); + + switch (encoder_pix_fmt) { + case MIPI_DSI_FMT_RGB888: + interface_pix_fmt = ROCKCHIP_OUT_MODE_P888; + break; + case MIPI_DSI_FMT_RGB666: + interface_pix_fmt = ROCKCHIP_OUT_MODE_P666; + break; + case MIPI_DSI_FMT_RGB565: + interface_pix_fmt = ROCKCHIP_OUT_MODE_P565; + break; + default: + WARN_ON(1); + return; + } + + rockchip_drm_crtc_mode_config(encoder->crtc, DRM_MODE_CONNECTOR_DSI, + interface_pix_fmt); +} + +static void rockchip_mipi_dsi_encoder_mode_set(struct drm_encoder *encoder, + struct drm_display_mode *mode, + struct drm_display_mode *adjusted_mode) +{ +} + +static void rockchip_mipi_dsi_encoder_commit(struct drm_encoder *encoder) +{ + struct rockchip_mipi_dsi *dsi = enc_to_dsi(encoder); + u32 val; + int mux = rockchip_drm_encoder_get_mux_id(dsi->dev->of_node, encoder); + + if (mux) + val = DSI0_SEL_VOP_LIT | (DSI0_SEL_VOP_LIT << 16); + else + val = DSI0_SEL_VOP_LIT << 16; + + regmap_write(dsi->regmap, GRF_SOC_CON6, val); + dev_dbg(dsi->dev, "vop %s output to dsi0\n", + (mux) ? "LIT" : "BIG"); +} + +static void rockchip_mipi_dsi_encoder_disable(struct drm_encoder *encoder) +{ +} + +static struct drm_encoder_helper_funcs +rockchip_mipi_dsi_encoder_helper_funcs = { + .mode_fixup = rockchip_mipi_dsi_encoder_mode_fixup, + .prepare = rockchip_mipi_dsi_encoder_prepare, + .mode_set = rockchip_mipi_dsi_encoder_mode_set, + .commit = rockchip_mipi_dsi_encoder_commit, + .disable = rockchip_mipi_dsi_encoder_disable, +}; + +static int rockchip_mipi_dsi_register(struct drm_device *drm, + struct rockchip_mipi_dsi *dsi) +{ + struct drm_encoder *encoder = &dsi->encoder; + struct device *dev = dsi->dev; + + encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, + dev->of_node); + /* + * If we failed to find the CRTC(s) which this encoder is + * supposed to be connected to, it's because the CRTC has + * not been registered yet. Defer probing, and hope that + * the required CRTC is added later. + */ + if (encoder->possible_crtcs == 0) + return -EPROBE_DEFER; + + drm_encoder_helper_add(&dsi->encoder, + &rockchip_mipi_dsi_encoder_helper_funcs); + drm_encoder_init(drm, &dsi->encoder, &rockchip_mipi_dsi_encoder_funcs, + DRM_MODE_ENCODER_DSI); + return 0; +} + +static enum drm_mode_status rockchip_mipi_dsi_mode_valid( + struct drm_connector *connector, + struct drm_display_mode *mode) +{ + /* + * The VID_PKT_SIZE field in the DSI_VID_PKT_CFG + * register is 11-bit. + */ + if (mode->hdisplay > 0x7ff) + return MODE_BAD_HVALUE; + + /* + * The V_ACTIVE_LINES field in the DSI_VTIMING_CFG + * register is 11-bit. + */ + if (mode->vdisplay > 0x7ff) + return MODE_BAD_VVALUE; + + return MODE_OK; +} + +static struct dw_mipi_dsi_plat_data rk3288_mipi_dsi_drv_data = { + .max_data_lanes = 4, + .mode_valid = rockchip_mipi_dsi_mode_valid, +}; + +static const struct of_device_id rockchip_mipi_dsi_dt_ids[] = { + { + .compatible = "rockchip,rk3288-mipi-dsi", + .data = &rk3288_mipi_dsi_drv_data, + }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, rockchip_mipi_dsi_dt_ids); + +static int rockchip_mipi_dsi_bind(struct device *dev, struct device *master, + void *data) +{ + const struct of_device_id *of_id = + of_match_device(rockchip_mipi_dsi_dt_ids, dev); + const struct dw_mipi_dsi_plat_data *pdata = of_id->data; + struct drm_device *drm = data; + struct rockchip_mipi_dsi *dsi; + int ret; + + dsi = devm_kzalloc(dev, sizeof(*dsi), GFP_KERNEL); + if (!dsi) + return -ENOMEM; + + dsi->dev = dev; + + ret = rockchip_mipi_dsi_register(drm, dsi); + if (ret) + return ret; + + ret = rockchip_mipi_parse_dt(dsi); + if (ret) + return ret; + + dev_set_drvdata(dev, dsi); + + return dw_mipi_dsi_bind(dev, master, data, &dsi->encoder, pdata); +} + +static void rockchip_mipi_dsi_unbind(struct device *dev, struct device *master, + void *data) +{ + return dw_mipi_dsi_unbind(dev, master, data); +} + +static const struct component_ops rockchip_mipi_dsi_ops = { + .bind = rockchip_mipi_dsi_bind, + .unbind = rockchip_mipi_dsi_unbind, +}; + +static int rockchip_mipi_dsi_probe(struct platform_device *pdev) +{ + return component_add(&pdev->dev, &rockchip_mipi_dsi_ops); +} + +static int rockchip_mipi_dsi_remove(struct platform_device *pdev) +{ + component_del(&pdev->dev, &rockchip_mipi_dsi_ops); + return 0; +} + +static struct platform_driver rockchip_mipi_dsi_driver = { + .probe = rockchip_mipi_dsi_probe, + .remove = rockchip_mipi_dsi_remove, + .driver = { + .of_match_table = rockchip_mipi_dsi_dt_ids, + .name = DRIVER_NAME, + }, +}; +module_platform_driver(rockchip_mipi_dsi_driver); + +MODULE_DESCRIPTION("ROCKCHIP MIPI DSI host controller driver"); +MODULE_AUTHOR("Chris Zhong "); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:" DRIVER_NAME); diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index eff545b..bfaa31a 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -1199,6 +1199,9 @@ static int vop_crtc_mode_set(struct drm_crtc *crtc, case DRM_MODE_CONNECTOR_HDMIA: VOP_CTRL_SET(vop, hdmi_en, 1); break; + case DRM_MODE_CONNECTOR_DSI: + VOP_CTRL_SET(vop, mipi_en, 1); + break; default: DRM_ERROR("unsupport connector_type[%d]\n", vop->connector_type);