From patchwork Thu Jan 14 12:31:37 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Wu X-Patchwork-Id: 8031461 Return-Path: X-Original-To: patchwork-linux-rockchip@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id C6093BEEE5 for ; Thu, 14 Jan 2016 12:32:04 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B204220454 for ; Thu, 14 Jan 2016 12:32:03 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A2A4920451 for ; Thu, 14 Jan 2016 12:32:02 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aJh4M-0003VZ-4U; Thu, 14 Jan 2016 12:32:02 +0000 Received: from lucky1.263xmail.com ([211.157.147.132]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1aJh3q-0003Hj-0X; Thu, 14 Jan 2016 12:31:31 +0000 Received: from david.wu?rock-chips.com (unknown [192.168.167.12]) by lucky1.263xmail.com (Postfix) with SMTP id B47595D18F; Thu, 14 Jan 2016 20:31:08 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.263.net (Postfix) with ESMTP id 78E7B3EC; Thu, 14 Jan 2016 20:31:06 +0800 (CST) X-RL-SENDER: david.wu@rock-chips.com X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: david.wu@rock-chips.com X-UNIQUE-TAG: <1405f33706919768b0a4ed54014ca547> X-ATTACHMENT-NUM: 0 X-SENDER: wdc@rock-chips.com X-DNS-TYPE: 0 Received: from unknown (unknown [58.22.7.114]) by smtp.263.net (Postfix) whith SMTP id 113669F7S6N; Thu, 14 Jan 2016 20:31:07 +0800 (CST) From: David Wu To: heiko@sntech.de Subject: [PATCH v3 2/4] i2c: rk3x: add ops to caculate i2c clocks Date: Thu, 14 Jan 2016 20:31:37 +0800 Message-Id: <1452774699-57455-3-git-send-email-david.wu@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1452774699-57455-1-git-send-email-david.wu@rock-chips.com> References: <1452774699-57455-1-git-send-email-david.wu@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160114_043130_651580_A0E0C10F X-CRM114-Status: GOOD ( 16.48 ) X-Spam-Score: -1.9 (-) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangtao@rock-chips.com, David Wu , hl@rock-chips.com, wsa@the-dreams.de, linux-gpio@vger.kernel.org, dianders@chromium.org, linux-kernel@vger.kernel.org, cf@rock-chips.com, andy.shevchenko@gmail.com, xjq@rock-chips.com, David Wu , zyw@rock-chips.com, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: David Wu I2c Controller of rk3x is updated for the rules to caculate clocks. So it need a new method to caculate i2c clock timing information for new version. The current method is defined as v0, and new is v1, next maybe v2...... Signed-off-by: David Wu --- Changes in v3: - use GENMASK(Andy) - Too many arguments for ops func, use struct for them(Andy) changes in v2: - split patch to three patches(Heiko) drivers/i2c/busses/i2c-rk3x.c | 80 +++++++++++++++++++++++++++++-------------- 1 file changed, 54 insertions(+), 26 deletions(-) diff --git a/drivers/i2c/busses/i2c-rk3x.c b/drivers/i2c/busses/i2c-rk3x.c index 1d86e8c..185e0f9 100644 --- a/drivers/i2c/busses/i2c-rk3x.c +++ b/drivers/i2c/busses/i2c-rk3x.c @@ -58,6 +58,11 @@ enum { #define REG_CON_LASTACK BIT(5) /* 1: send NACK after last received byte */ #define REG_CON_ACTACK BIT(6) /* 1: stop if NACK is received */ +#define VERSION_MASK GENMASK(31, 16) +#define VERSION_SHIFT 16 + +#define RK3X_I2C_V0 0x0 + /* REG_MRXADDR bits */ #define REG_MRXADDR_VALID(x) BIT(24 + (x)) /* [x*8+7:x*8] of MRX[R]ADDR valid */ @@ -90,10 +95,27 @@ struct rk3x_i2c_soc_data { int grf_offset; }; +/** + * struct rk3x_priv_i2c_timings - rk3x I2C timing information + * @div_low: Divider output for low + * @div_high: Divider output for high + */ +struct rk3x_priv_i2c_timings { + unsigned long div_low; + unsigned long div_high; +}; + +struct rk3x_i2c_ops { + int (*calc_clock)(unsigned long, + struct i2c_timings *, + struct rk3x_priv_i2c_timings *); +}; + struct rk3x_i2c { struct i2c_adapter adap; struct device *dev; struct rk3x_i2c_soc_data *soc_data; + struct rk3x_i2c_ops ops; /* Hardware resources */ void __iomem *regs; @@ -102,6 +124,7 @@ struct rk3x_i2c { /* Settings */ struct i2c_timings t; + struct rk3x_priv_i2c_timings t_priv; /* Synchronization & notification */ spinlock_t lock; @@ -431,21 +454,20 @@ out: } /** - * Calculate divider values for desired SCL frequency + * Calculate timing clock info values for desired SCL frequency * * @clk_rate: I2C input clock rate - * @t_input: Known I2C timing information. - * @div_low: Divider output for low - * @div_high: Divider output for high + * @t_input: Known I2C timing information + * @t_output: Caculated rk3x private timing information that would + * be written into regs * * Returns: 0 on success, -EINVAL if the goal SCL rate is too slow. In that case * a best-effort divider value is returned in divs. If the target rate is * too high, we silently use the highest possible rate. */ -static int rk3x_i2c_calc_divs(unsigned long clk_rate, - struct i2c_timings *t_input, - unsigned long *div_low, - unsigned long *div_high) +static int rk3x_i2c_v0_calc_clock(unsigned long clk_rate, + struct i2c_timings *t_input, + struct rk3x_priv_i2c_timings *t_output) { unsigned long spec_min_low_ns, spec_min_high_ns; unsigned long spec_setup_start, spec_max_data_hold_ns; @@ -553,8 +575,8 @@ static int rk3x_i2c_calc_divs(unsigned long clk_rate, * Time needed to meet hold requirements is important. * Just use that. */ - *div_low = min_low_div; - *div_high = min_high_div; + t_output->div_low = min_low_div; + t_output->div_high = min_high_div; } else { /* * We've got to distribute some time among the low and high @@ -583,25 +605,25 @@ static int rk3x_i2c_calc_divs(unsigned long clk_rate, /* Give low the "ideal" and give high whatever extra is left */ extra_low_div = ideal_low_div - min_low_div; - *div_low = ideal_low_div; - *div_high = min_high_div + (extra_div - extra_low_div); + t_output->div_low = ideal_low_div; + t_output->div_high = min_high_div + (extra_div - extra_low_div); } /* * Adjust to the fact that the hardware has an implicit "+1". * NOTE: Above calculations always produce div_low > 0 and div_high > 0. */ - *div_low = *div_low - 1; - *div_high = *div_high - 1; + t_output->div_low = t_output->div_low - 1; + t_output->div_high = t_output->div_high - 1; /* Maximum divider supported by hw is 0xffff */ - if (*div_low > 0xffff) { - *div_low = 0xffff; + if (t_output->div_low > 0xffff) { + t_output->div_low = 0xffff; ret = -EINVAL; } - if (*div_high > 0xffff) { - *div_high = 0xffff; + if (t_output->div_high > 0xffff) { + t_output->div_high = 0xffff; ret = -EINVAL; } @@ -610,19 +632,21 @@ static int rk3x_i2c_calc_divs(unsigned long clk_rate, static void rk3x_i2c_adapt_div(struct rk3x_i2c *i2c, unsigned long clk_rate) { - unsigned long div_low, div_high; u64 t_low_ns, t_high_ns; int ret; - ret = rk3x_i2c_calc_divs(clk_rate, &i2c->t, &div_low, &div_high); + ret = i2c->ops.calc_clock(clk_rate, &i2c->t, &i2c->t_priv); WARN_ONCE(ret != 0, "Could not reach SCL freq %u", i2c->t.bus_freq_hz); clk_enable(i2c->clk); - i2c_writel(i2c, (div_high << 16) | (div_low & 0xffff), REG_CLKDIV); + i2c_writel(i2c, (i2c->t_priv.div_high << 16) | + (i2c->t_priv.div_low & 0xffff), REG_CLKDIV); clk_disable(i2c->clk); - t_low_ns = div_u64(((u64)div_low + 1) * 8 * 1000000000, clk_rate); - t_high_ns = div_u64(((u64)div_high + 1) * 8 * 1000000000, clk_rate); + t_low_ns = div_u64(((u64)i2c->t_priv.div_low + 1) * 8 * 1000000000, + clk_rate); + t_high_ns = div_u64(((u64)i2c->t_priv.div_high + 1) * 8 * 1000000000, + clk_rate); dev_dbg(i2c->dev, "CLK %lukhz, Req %uns, Act low %lluns high %lluns\n", clk_rate / 1000, @@ -652,12 +676,11 @@ static int rk3x_i2c_clk_notifier_cb(struct notifier_block *nb, unsigned long { struct clk_notifier_data *ndata = data; struct rk3x_i2c *i2c = container_of(nb, struct rk3x_i2c, clk_rate_nb); - unsigned long div_low, div_high; switch (event) { case PRE_RATE_CHANGE: - if (rk3x_i2c_calc_divs(ndata->new_rate, &i2c->t, - &div_low, &div_high) != 0) + if (i2c->ops.calc_clock(ndata->new_rate, &i2c->t, + &i2c->t_priv) != 0) return NOTIFY_STOP; /* scale up */ @@ -861,6 +884,7 @@ static int rk3x_i2c_probe(struct platform_device *pdev) u32 value; int irq; unsigned long clk_rate; + unsigned int version; i2c = devm_kzalloc(&pdev->dev, sizeof(struct rk3x_i2c), GFP_KERNEL); if (!i2c) @@ -944,6 +968,10 @@ static int rk3x_i2c_probe(struct platform_device *pdev) platform_set_drvdata(pdev, i2c); + version = (readl(i2c->regs + REG_CON) & VERSION_MASK) >> VERSION_SHIFT; + if (version == RK3X_I2C_V0) + i2c->ops.calc_clock = rk3x_i2c_v0_calc_clock; + ret = clk_prepare(i2c->clk); if (ret < 0) { dev_err(&pdev->dev, "Could not prepare clock\n");