From patchwork Mon Jan 25 12:38:08 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caesar Wang X-Patchwork-Id: 8108231 Return-Path: X-Original-To: patchwork-linux-rockchip@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 28DF2BEEE5 for ; Mon, 25 Jan 2016 12:39:17 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 361DE202E9 for ; Mon, 25 Jan 2016 12:39:16 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 004F42024D for ; Mon, 25 Jan 2016 12:39:13 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aNgQJ-0006i3-N5; Mon, 25 Jan 2016 12:39:11 +0000 Received: from mail-pa0-f66.google.com ([209.85.220.66]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1aNgQG-0006RY-N5; Mon, 25 Jan 2016 12:39:09 +0000 Received: by mail-pa0-f66.google.com with SMTP id pv5so6540541pac.0; Mon, 25 Jan 2016 04:38:47 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=ss0ldPZLLPthGGUHatDQTjhBGfhzQnD+Y41lEdYTGy8=; b=muYh2g6hPU6wyYNlvoFrUdsAEsyHhl6ARAgtrJXtdlJZ0yIcwF643Hbjj2Ee07I59h Wq0q4as0KpTfxIG3sTn0Bl7oACvM9+7aQUeLjIkECx/FUa6EwmAvVEnOWjiJj/ANQCgW 7HC9XUj4dbwUCBQ++9ty3YH6Ip++cd57mkMDMjx1jOROgBCwOYb1lS7kEa2cJ5okIUFo By1bIIkt1r7oYsRwd2kIwm7ZRrRoFev4krk8hJX/J/62PIMr1UjuQSG/xR3ha3vbyxPI YbtUzO3AEjps1z6ThQ+8zGMJ337oloi+HIYT6bSZBAoe5IAqL8yES9gjne6ahC0TVKHz yYlQ== X-Gm-Message-State: AG10YOQTgp75gdUulvbh9mgkyYWeEBEfxQZow9RUUjHX8AdiLmFpgdzLgepGgBxO7JDRXw== X-Received: by 10.67.14.74 with SMTP id fe10mr25638828pad.151.1453725527419; Mon, 25 Jan 2016 04:38:47 -0800 (PST) Received: from localhost.localdomain ([103.29.142.67]) by smtp.gmail.com with ESMTPSA id o67sm28458177pfa.58.2016.01.25.04.38.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 25 Jan 2016 04:38:45 -0800 (PST) From: Caesar Wang To: Heiko Stuebner Subject: [PATCH v2] ARM: dts: rockchip: add support emac for RK3036 Date: Mon, 25 Jan 2016 20:38:08 +0800 Message-Id: <1453725488-5279-1-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160125_043908_937273_62AE77E3 X-CRM114-Status: GOOD ( 11.85 ) X-Spam-Score: -2.4 (--) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-rockchip@lists.infradead.org, Caesar Wang , zhengxing , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: zhengxing This patch describe the emac, and we need to let mac clock under the APLL which is able to provide the accurate 50MHz what mac_ref need. This patch makes the emac parent clock is DPLL instead of APLL. since that will cause some unstable things if the cpufreq is working. Signed-off-by: Xing Zheng Signed-off-by: Caesar Wang --- Changes in v2: - add the assigned clock parent for emac. https://github.com/rockchip-linux/u-boot/commit/d64ef6b272d84c92bd02a7925f500880633c8599 - change the emac to a better place. arch/arm/boot/dts/rk3036-evb.dts | 23 ++++++++++++++++++++++ arch/arm/boot/dts/rk3036-kylin.dts | 21 ++++++++++++++++++++ arch/arm/boot/dts/rk3036.dtsi | 39 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 83 insertions(+) diff --git a/arch/arm/boot/dts/rk3036-evb.dts b/arch/arm/boot/dts/rk3036-evb.dts index 28a0336..d7d3719 100644 --- a/arch/arm/boot/dts/rk3036-evb.dts +++ b/arch/arm/boot/dts/rk3036-evb.dts @@ -47,6 +47,17 @@ compatible = "rockchip,rk3036-evb", "rockchip,rk3036"; }; +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&rmii_rst>; + phy = <&phy0>; + status = "okay"; + + phy0: ethernet-phy@0 { + reg = <0>; + }; +}; + &i2c1 { status = "okay"; @@ -62,3 +73,15 @@ &uart2 { status = "okay"; }; + +&pinctrl { + pcfg_output_high: pcfg-output-high { + output-high; + }; + + emac { + rmii_rst: rmii-rst { + rockchip,pins = <2 22 RK_FUNC_GPIO &pcfg_output_high>; + }; + }; +}; diff --git a/arch/arm/boot/dts/rk3036-kylin.dts b/arch/arm/boot/dts/rk3036-kylin.dts index 190f22c..0bc127b 100644 --- a/arch/arm/boot/dts/rk3036-kylin.dts +++ b/arch/arm/boot/dts/rk3036-kylin.dts @@ -101,6 +101,17 @@ status = "okay"; }; +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&rmii_rst>; + phy = <&phy0>; + status = "okay"; + + phy0: ethernet-phy@0 { + reg = <0>; + }; +}; + &emmc { status = "okay"; }; @@ -359,6 +370,16 @@ }; &pinctrl { + pcfg_output_high: pcfg-output-high { + output-high; + }; + + emac { + rmii_rst: rmii-rst { + rockchip,pins = <2 22 RK_FUNC_GPIO &pcfg_output_high>; + }; + }; + pmic { pmic_int: pmic-int { rockchip,pins = <2 2 RK_FUNC_GPIO &pcfg_pull_default>; diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index 7897449..436c77a 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -186,6 +186,27 @@ status = "disabled"; }; + emac: ethernet@10200000 { + compatible = "rockchip,rk3036-emac", "snps,arc-emac"; + reg = <0x10200000 0x4000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + rockchip,grf = <&grf>; + clocks = <&cru HCLK_MAC>, <&cru SCLK_MACREF>, <&cru SCLK_MAC>; + clock-names = "hclk", "macref", "macclk"; + /* + * Fix the emac parent clock is DPLL instead of APLL. + * since that will cause some unstable things if the cpufreq + * is working. (e.g: the accurate 50MHz what mac_ref need) + */ + assigned-clocks = <&cru SCLK_MACPLL>; + assigned-clock-parents = <&cru PLL_DPLL>; + max-speed = <100>; + phy-mode = "rmii"; + status = "disabled"; + }; + sdmmc: dwmmc@10214000 { compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x10214000 0x4000>; @@ -556,6 +577,24 @@ }; }; + emac { + emac_xfer: emac-xfer { + rockchip,pins = <2 10 RK_FUNC_1 &pcfg_pull_default>, /* crs_dvalid */ + <2 13 RK_FUNC_1 &pcfg_pull_default>, /* tx_en */ + <2 14 RK_FUNC_1 &pcfg_pull_default>, /* mac_clk */ + <2 15 RK_FUNC_1 &pcfg_pull_default>, /* rx_err */ + <2 16 RK_FUNC_1 &pcfg_pull_default>, /* rxd1 */ + <2 17 RK_FUNC_1 &pcfg_pull_default>, /* rxd0 */ + <2 18 RK_FUNC_1 &pcfg_pull_default>, /* txd1 */ + <2 19 RK_FUNC_1 &pcfg_pull_default>; /* txd0 */ + }; + + emac_mdio: emac-mdio { + rockchip,pins = <2 12 RK_FUNC_1 &pcfg_pull_default>, /* mac_md */ + <2 25 RK_FUNC_1 &pcfg_pull_default>; /* mac_mdclk */ + }; + }; + i2c0 { i2c0_xfer: i2c0-xfer { rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>,