From patchwork Tue Feb 2 03:48:19 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caesar Wang X-Patchwork-Id: 8186801 Return-Path: X-Original-To: patchwork-linux-rockchip@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 95E6F9F4DD for ; Tue, 2 Feb 2016 03:49:25 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id ADDC42025A for ; Tue, 2 Feb 2016 03:49:24 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DB35E20166 for ; Tue, 2 Feb 2016 03:49:23 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aQRxy-0006jD-TF; Tue, 02 Feb 2016 03:49:22 +0000 Received: from mail-pa0-f65.google.com ([209.85.220.65]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1aQRxw-0006gu-NH for linux-rockchip@lists.infradead.org; Tue, 02 Feb 2016 03:49:21 +0000 Received: by mail-pa0-f65.google.com with SMTP id pv5so7991169pac.0 for ; Mon, 01 Feb 2016 19:49:00 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=gOxHyidyq5GqpwZD6OMc98aQpdkk6Zh7MDaazVVJQUc=; b=SJLiPtlS+7fz3jmU7i6FRyWWlyk3OanxCXDThR6R+ascUg8wLVa7c03YQD+m+3mv9w 8JmshfnHVXDADr9yTseOV0mCULu8gYzKmMvuctPtJirsR1CMshBPyest4HQDapZkbiHj xrmkOhC19b4ol0kYf9E+VV/WSnxxlnvHUmmmRfYfTSHc2Q+ZQrVZfyQ2Fke2vRj32tzH DKbUnVyr4Ag30u489M8P/4gwtmh5Bakk+Cuo8c4HaBMvknjJjfPSM9whSgFal5IS4EM7 GRn8e63MRJmzqYe1tUr76VuVlt92Z5WTMCh6FXjMdgD57Ea/Ff6Bq1NIHtROucuHtsHo 6ybw== X-Gm-Message-State: AG10YORHpxSNq+8KSnbKpdqbnMkz8z6LlelgvXIGKgLl3MH3xJDCDhbpb9x9FY3UJp7Hmw== X-Received: by 10.66.252.42 with SMTP id zp10mr43981852pac.29.1454384939843; Mon, 01 Feb 2016 19:48:59 -0800 (PST) Received: from localhost.localdomain ([103.29.142.67]) by smtp.gmail.com with ESMTPSA id mj1sm46639993pab.34.2016.02.01.19.48.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 01 Feb 2016 19:48:58 -0800 (PST) From: Caesar Wang To: mturquette@baylibre.com, sboyd@codeaurora.org Subject: [PATCH v5 2/8] clk: rockchip: rk3036: fix and add node id for emac clock Date: Tue, 2 Feb 2016 11:48:19 +0800 Message-Id: <1454384899-7270-1-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1454384032-6794-1-git-send-email-wxt@rock-chips.com> References: <1454384032-6794-1-git-send-email-wxt@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160201_194920_800355_57B57484 X-CRM114-Status: UNSURE ( 9.93 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.6 (--) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, heiko@sntech.de, zhengxing , jeffy.chen@rock-chips.com, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, keescook@google.com, linux-clk@vger.kernel.org, leozwang@google.com, Caesar Wang MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: zhengxing In the emac driver, we need to refer HCLK_MAC since there are only 3PLLs (APLL/GPLL/DPLL) on the rk3036, most clock are under the GPLL, and it is unable to provide the accurate rate for mac_ref which need to 50MHz probability, we should let it under the DPLL and are able to set the freq which integer multiples of 50MHz, so we add these emac node for reference. Signed-off-by: Xing Zheng Signed-off-by: Caesar Wang --- Changes in v5: None Changes in v4: - fix the commit, pick up from the https://patchwork.kernel.org/patch/7976631/. - The emac parent shouldn't depend on the APLL. instead of DPLL. drivers/clk/rockchip/clk-rk3036.c | 9 ++++++--- include/dt-bindings/clock/rk3036-cru.h | 2 ++ 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3036.c b/drivers/clk/rockchip/clk-rk3036.c index be71a41..701f702 100644 --- a/drivers/clk/rockchip/clk-rk3036.c +++ b/drivers/clk/rockchip/clk-rk3036.c @@ -343,8 +343,11 @@ static struct rockchip_clk_branch rk3036_clk_branches[] __initdata = { RK2928_CLKSEL_CON(16), 0, 2, MFLAGS, 2, 5, DFLAGS, RK2928_CLKGATE_CON(10), 5, GFLAGS), - COMPOSITE_NOGATE(0, "mac_pll_src", mux_pll_src_3plls_p, 0, - RK2928_CLKSEL_CON(21), 0, 2, MFLAGS, 9, 5, DFLAGS), + MUX(SCLK_MACPLL, "mac_pll_pre", mux_pll_src_3plls_p, 0, + RK2928_CLKSEL_CON(21), 0, 2, MFLAGS), + DIV(0, "mac_pll_src", "mac_pll_pre", 0, + RK2928_CLKSEL_CON(21), 9, 5, DFLAGS), + MUX(SCLK_MACREF, "mac_clk_ref", mux_mac_p, CLK_SET_RATE_PARENT, RK2928_CLKSEL_CON(21), 3, 1, MFLAGS), @@ -404,7 +407,7 @@ static struct rockchip_clk_branch rk3036_clk_branches[] __initdata = { GATE(HCLK_OTG1, "hclk_otg1", "hclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(7), 3, GFLAGS), GATE(HCLK_I2S, "hclk_i2s", "hclk_peri", 0, RK2928_CLKGATE_CON(7), 2, GFLAGS), GATE(0, "hclk_sfc", "hclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(3), 14, GFLAGS), - GATE(0, "hclk_mac", "hclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(3), 15, GFLAGS), + GATE(HCLK_MAC, "hclk_mac", "hclk_peri", 0, RK2928_CLKGATE_CON(3), 5, GFLAGS), /* pclk_peri gates */ GATE(0, "pclk_peri_matrix", "pclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(4), 1, GFLAGS), diff --git a/include/dt-bindings/clock/rk3036-cru.h b/include/dt-bindings/clock/rk3036-cru.h index ebc7a7b..de44109 100644 --- a/include/dt-bindings/clock/rk3036-cru.h +++ b/include/dt-bindings/clock/rk3036-cru.h @@ -54,6 +54,7 @@ #define SCLK_PVTM_VIDEO 125 #define SCLK_MAC 151 #define SCLK_MACREF 152 +#define SCLK_MACPLL 153 #define SCLK_SFC 160 /* aclk gates */ @@ -92,6 +93,7 @@ #define HCLK_SDMMC 456 #define HCLK_SDIO 457 #define HCLK_EMMC 459 +#define HCLK_MAC 460 #define HCLK_I2S 462 #define HCLK_LCDC 465 #define HCLK_ROM 467