From patchwork Wed Mar 9 18:44:16 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Douglas Anderson X-Patchwork-Id: 8548441 Return-Path: X-Original-To: patchwork-linux-rockchip@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 18A199F372 for ; Wed, 9 Mar 2016 18:45:31 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 33FA420295 for ; Wed, 9 Mar 2016 18:45:30 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 489032021A for ; Wed, 9 Mar 2016 18:45:29 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1adj6u-0008ME-Sb; Wed, 09 Mar 2016 18:45:28 +0000 Received: from mail-pa0-x22e.google.com ([2607:f8b0:400e:c03::22e]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1adj6Z-000767-W4 for linux-rockchip@lists.infradead.org; Wed, 09 Mar 2016 18:45:09 +0000 Received: by mail-pa0-x22e.google.com with SMTP id td3so19734569pab.2 for ; Wed, 09 Mar 2016 10:44:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=jv/VV4UzKBpiLVFZQThIAo0ZYJ2Ef+zaJs3YClQApGg=; b=cYKHjBlQPbZQIsoLBI26XbYTWEQ05Fy7Cgb8FjLVra0keNtdBO7aKiVA7nOosGKURU 3Dv1jRGmPaIn6psn03NZPgn5WtTCvPEhnuk91KSvU5vK7SzuXYCxAyNKLb8jbrjkVJsC nf4wJ8U4WxNCzbjqDLCu4WscFEsGV8vD/9FK8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=jv/VV4UzKBpiLVFZQThIAo0ZYJ2Ef+zaJs3YClQApGg=; b=PsudWuvpnnw5+ooLWrII4L6QhrIaiiK+DgSnBGG0KTdYF4hyykYlXBlmEbPp2bS5iA hqjHPUhgoTAM5q4lq5TPjPGyGxKif/OaIGztRzMDioIK6devLAXOUEM4kCIMB9ZV+v6Q K3UrF4nqdVT2uIVqAraK65AOmh3W3VPuZYN7uFhMONzuglnQ7Co0/aT6MBv+eU3C34QY J8WmMos3kEjVSteoEVqys4Lyrlz4brQnZbP9Oe9ya0El/dvUSunOD/MzrCwrSBZHqd/H +V/kfmuse3LLF1YNKdkWY8n8qj6nJcwjgWt3KhkI3obz1hY6oFx+9nSShaRCB70eF+jj kVRQ== X-Gm-Message-State: AD7BkJK9oF/ozAy12Hy6MlN1+v1fDRczCTEny5+PsA5p/1d7KyekhX6Fvy37XiaDzjy6AA== X-Received: by 10.67.5.68 with SMTP id ck4mr51812223pad.3.1457549087101; Wed, 09 Mar 2016 10:44:47 -0800 (PST) Received: from tictac.mtv.corp.google.com ([172.22.65.76]) by smtp.gmail.com with ESMTPSA id x18sm14025451pfi.42.2016.03.09.10.44.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 09 Mar 2016 10:44:46 -0800 (PST) From: Douglas Anderson To: Russell King , Will Deacon , Heiko Stuebner , Matthias Brugger Subject: [PATCH v2 3/3] ARM: errata: Workaround errata A12 825619 / A17 852421 Date: Wed, 9 Mar 2016 10:44:16 -0800 Message-Id: <1457549056-22359-3-git-send-email-dianders@chromium.org> X-Mailer: git-send-email 2.7.0.rc3.207.g0ac5344 In-Reply-To: <1457549056-22359-1-git-send-email-dianders@chromium.org> References: <1457549056-22359-1-git-send-email-dianders@chromium.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160309_104508_113163_BA5E4ADE X-CRM114-Status: GOOD ( 12.01 ) X-Spam-Score: -2.7 (--) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: nicolas.pitre@linaro.org, f.fainelli@gmail.com, ard.biesheuvel@linaro.org, Anson.Huang@freescale.com, Douglas Anderson , linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, olof@lixom.net, linux-arm-kernel@lists.infradead.org, sebastian.hesselbarth@gmail.com MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The workaround for both errata is to set bit 24 in the diagnostic register. There are no known end-user bugs solved by fixing this errata, but the fix is trivial and it seems sane to apply it. The arguments for why this needs to be in the kernel are similar to the arugments made in the patch "Workaround errata A12 818325/852422 A17 852423". Signed-off-by: Douglas Anderson --- Changes in v2: - A12 825619 / A17 852421 new for v2. arch/arm/Kconfig | 18 ++++++++++++++++++ arch/arm/mm/proc-v7.S | 11 +++++++++++ 2 files changed, 29 insertions(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index c3e46c9aacf5..cd3b3fda0e16 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1181,6 +1181,24 @@ config ARM_ERRATA_821420 one is in the shadow of a branch or abort, can lead to a deadlock when the VMOV instructions are issued out-of-order. +config ARM_ERRATA_825619 + bool "ARM errata: A12: DMB NSHST/ISHST mixed ... might cause deadlock" + depends on CPU_V7 + help + This option enables the workaround for the 825619 Cortex-A12 + (all revs) erratum. Within rare timing constraints, executing a + DMB NSHST or DMB ISHST instruction followed by a mix of Cacheable + and Device/Strongly-Ordered loads and stores might cause deadlock + +config ARM_ERRATA_852421 + bool "ARM errata: A17: DMB ST might fail to create order between stores" + depends on CPU_V7 + help + This option enables the workaround for the 852421 Cortex-A17 + (r1p0, r1p1, r1p2) erratum. Under very rare timing conditions, + execution of a DMB ST instruction might fail to properly order + stores from GroupA and stores from GroupB. + config ARM_ERRATA_852423 bool "ARM errata: A17: some seqs of opposed cond code instrs => deadlock or corruption" depends on CPU_V7 diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index a7f9e7567878..0e20537a7d14 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -373,9 +373,20 @@ __ca12_errata: orr r10, r10, #1 << 1 @ set bit #1 mcr p15, 0, r10, c15, c0, 2 @ write internal feature reg #endif +#ifdef CONFIG_ARM_ERRATA_825619 + mrc p15, 0, r10, c15, c0, 1 @ read diagnostic register + orr r10, r10, #1 << 24 @ set bit #24 + mcr p15, 0, r10, c15, c0, 1 @ write diagnostic register +#endif b __errata_finish __ca17_errata: +#ifdef CONFIG_ARM_ERRATA_852421 + cmp r6, #0x12 @ only present up to r1p2 + mrcle p15, 0, r10, c15, c0, 1 @ read diagnostic register + orrle r10, r10, #1 << 24 @ set bit #24 + mcrle p15, 0, r10, c15, c0, 1 @ write diagnostic register +#endif #ifdef CONFIG_ARM_ERRATA_852423 cmp r6, #0x12 @ only present up to r1p2 mrcle p15, 0, r10, c15, c0, 1 @ read diagnostic register