From patchwork Mon May 2 16:36:22 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Heiko_St=C3=BCbner?= X-Patchwork-Id: 8993811 Return-Path: X-Original-To: patchwork-linux-rockchip@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 40375BF29F for ; Mon, 2 May 2016 16:37:06 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 54CE320253 for ; Mon, 2 May 2016 16:37:05 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4B6A52024C for ; Mon, 2 May 2016 16:37:04 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1axGqG-0004KT-1l; Mon, 02 May 2016 16:37:04 +0000 Received: from gloria.sntech.de ([95.129.55.99]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1axGqB-0004Fj-L3 for linux-rockchip@lists.infradead.org; Mon, 02 May 2016 16:37:01 +0000 Received: from ip9234b8f8.dynamic.kabel-deutschland.de ([146.52.184.248] helo=diego.sntech) by gloria.sntech.de with esmtpsa (TLS1.1:RSA_AES_128_CBC_SHA1:128) (Exim 4.80) (envelope-from ) id 1axGpg-0000Hp-30; Mon, 02 May 2016 18:36:28 +0200 From: Heiko Stuebner To: mturquette@baylibre.com, sboyd@codeaurora.org Subject: [RFC PATCH 3/3] clk: rockchip: make rk3399 vop dclks keep their rate on parent rate changes Date: Mon, 2 May 2016 18:36:22 +0200 Message-Id: <1462206982-10444-4-git-send-email-heiko@sntech.de> X-Mailer: git-send-email 2.8.0.rc3 In-Reply-To: <1462206982-10444-1-git-send-email-heiko@sntech.de> References: <1462206982-10444-1-git-send-email-heiko@sntech.de> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160502_093659_987123_034D0D02 X-CRM114-Status: UNSURE ( 7.16 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.9 (--) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Heiko Stuebner , zhengxing@rock-chips.com, tomeu.vizoso@collabora.com, zhangqing@rock-chips.com, linux-rockchip@lists.infradead.org, linux-clk@vger.kernel.org MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The rk3399 hdmi phy is supplied by the vpll directly and needs to adapt that frequency depending on the selected resolution on the hdmi output. For the hdmi-phy the vpll frequency is supplied unchanged without any dividers being present there. The vpll also is one of the sources the general display clock of the visual output processor (vop) and as it is somewhat special for display operations possibly also the preferred pll source. Here a divider is available between the pll-mux and the vop clock, so that this part can adapt the resulting frequency if needed. So to keep the vop clock in line with the target rate, set the newly introduced CLK_KEEP_REQ_RATE flag for the dclk_vop clocks on rk3399. Signed-off-by: Heiko Stuebner --- drivers/clk/rockchip/clk-rk3399.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c index 5248726..4462a50 100644 --- a/drivers/clk/rockchip/clk-rk3399.c +++ b/drivers/clk/rockchip/clk-rk3399.c @@ -277,11 +277,11 @@ static struct rockchip_clk_branch rk3399_uart4_pmu_fracmux __initdata = RK3399_PMU_CLKSEL_CON(5), 8, 2, MFLAGS); static struct rockchip_clk_branch rk3399_dclk_vop0_fracmux __initdata = - MUX(DCLK_VOP0, "dclk_vop0", mux_dclk_vop0_p, CLK_SET_RATE_PARENT, + MUX(DCLK_VOP0, "dclk_vop0", mux_dclk_vop0_p, CLK_SET_RATE_PARENT | CLK_KEEP_REQ_RATE, RK3399_CLKSEL_CON(49), 11, 1, MFLAGS); static struct rockchip_clk_branch rk3399_dclk_vop1_fracmux __initdata = - MUX(DCLK_VOP1, "dclk_vop1", mux_dclk_vop1_p, CLK_SET_RATE_PARENT, + MUX(DCLK_VOP1, "dclk_vop1", mux_dclk_vop1_p, CLK_SET_RATE_PARENT | CLK_KEEP_REQ_RATE, RK3399_CLKSEL_CON(50), 11, 1, MFLAGS); static struct rockchip_clk_branch rk3399_pmuclk_wifi_fracmux __initdata =