From patchwork Thu Jun 30 11:12:54 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Wu X-Patchwork-Id: 9207253 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9461C6089D for ; Thu, 30 Jun 2016 11:15:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 83FDE28615 for ; Thu, 30 Jun 2016 11:15:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 787F328661; Thu, 30 Jun 2016 11:15:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1C9D828615 for ; Thu, 30 Jun 2016 11:15:03 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bIZvy-0001vW-Jq; Thu, 30 Jun 2016 11:15:02 +0000 Received: from regular1.263xmail.com ([211.150.99.131]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bIZvu-0001ga-Tx for linux-rockchip@lists.infradead.org; Thu, 30 Jun 2016 11:15:01 +0000 Received: from william.wu?rock-chips.com (unknown [192.168.167.230]) by regular1.263xmail.com (Postfix) with SMTP id 64D22611D; Thu, 30 Jun 2016 19:14:34 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.263.net (Postfix) with ESMTP id 16DE166951; Thu, 30 Jun 2016 19:14:34 +0800 (CST) X-RL-SENDER: william.wu@rock-chips.com X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: william.wu@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-SENDER: wulf@rock-chips.com X-DNS-TYPE: 0 Received: from unknown (unknown [58.22.7.114]) by smtp.263.net (Postfix) whith SMTP id 24975LOC4O4; Thu, 30 Jun 2016 19:14:35 +0800 (CST) From: William Wu To: gregkh@linuxfoundation.org, balbi@kernel.org, heiko@sntech.de Subject: [PATCH v5 3/5] usb: dwc3: add phyif_utmi_quirk Date: Thu, 30 Jun 2016 19:12:54 +0800 Message-Id: <1467285176-25222-4-git-send-email-william.wu@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1467285176-25222-1-git-send-email-william.wu@rock-chips.com> References: <1467285176-25222-1-git-send-email-william.wu@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160630_041459_580216_D8AB6495 X-CRM114-Status: GOOD ( 12.27 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangtao@rock-chips.com, mark.rutland@arm.com, sergei.shtylyov@cogentembedded.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, kever.yang@rock-chips.com, dianders@google.com, linux-rockchip@lists.infradead.org, robh+dt@kernel.org, eddie.cai@rock-chips.com, William Wu , briannorris@google.com, John.Youn@synopsys.com MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add a quirk to configure the core to support the UTMI+ PHY with an 8- or 16-bit interface. UTMI+ PHY interface is hardware property, and it's platform dependent. Normall, the PHYIf can be configured during coreconsultant. But for some specific usb cores(e.g. rk3399 soc dwc3), the default PHYIf configuration value is fault, so we need to reconfigure it by software. And refer to the dwc3 databook, the GUSB2PHYCFG.USBTRDTIM must be set to the corresponding value according to the UTMI+ PHY interface. Signed-off-by: William Wu --- Changes in v5: - None Changes in v4: - rebase on top of balbi testing/next, remove pdata (balbi) Changes in v3: - None Changes in v2: - add a quirk for phyif_utmi (balbi) Documentation/devicetree/bindings/usb/dwc3.txt | 4 ++++ drivers/usb/dwc3/core.c | 19 +++++++++++++++++++ drivers/usb/dwc3/core.h | 12 ++++++++++++ 3 files changed, 35 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt index 1ada121..34d13a5 100644 --- a/Documentation/devicetree/bindings/usb/dwc3.txt +++ b/Documentation/devicetree/bindings/usb/dwc3.txt @@ -42,6 +42,10 @@ Optional properties: - snps,dis_u2_freeclk_exists_quirk: when set, clear the u2_freeclk_exists in GUSB2PHYCFG, specify that USB2 PHY doesn't provide a free-running PHY clock. + - snps,phyif_utmi_quirk: when set core will set phyif UTMI+ interface. + - snps,phyif_utmi: the value to configure the core to support a UTMI+ PHY + with an 8- or 16-bit interface. Value 0 select 8-bit + interface, value 1 select 16-bit interface. - snps,is-utmi-l1-suspend: true when DWC3 asserts output signal utmi_l1_suspend_n, false when asserts utmi_sleep_n - snps,hird-threshold: HIRD threshold diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 34ab9c3..e880686 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -408,6 +408,7 @@ static void dwc3_cache_hwparams(struct dwc3 *dwc) static int dwc3_phy_setup(struct dwc3 *dwc) { u32 reg; + u32 usbtrdtim; int ret; reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)); @@ -503,6 +504,15 @@ static int dwc3_phy_setup(struct dwc3 *dwc) if (dwc->dis_u2_freeclk_exists_quirk) reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS; + if (dwc->phyif_utmi_quirk) { + reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK | + DWC3_GUSB2PHYCFG_USBTRDTIM_MASK); + usbtrdtim = dwc->phyif_utmi ? USBTRDTIM_UTMI_16_BIT : + USBTRDTIM_UTMI_8_BIT; + reg |= DWC3_GUSB2PHYCFG_PHYIF(dwc->phyif_utmi) | + DWC3_GUSB2PHYCFG_USBTRDTIM(usbtrdtim); + } + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); return 0; @@ -834,6 +844,7 @@ static int dwc3_probe(struct platform_device *pdev) struct resource *res; struct dwc3 *dwc; u8 lpm_nyet_threshold; + u8 phyif_utmi; u8 tx_de_emphasis; u8 hird_threshold; @@ -880,6 +891,9 @@ static int dwc3_probe(struct platform_device *pdev) /* default to highest possible threshold */ lpm_nyet_threshold = 0xff; + /* default to UTMI+ 8-bit interface */ + phyif_utmi = 0; + /* default to -3.5dB de-emphasis */ tx_de_emphasis = 1; @@ -929,6 +943,10 @@ static int dwc3_probe(struct platform_device *pdev) "snps,dis_rxdet_inp3_quirk"); dwc->dis_u2_freeclk_exists_quirk = device_property_read_bool(dev, "snps,dis_u2_freeclk_exists_quirk"); + dwc->phyif_utmi_quirk = device_property_read_bool(dev, + "snps,phyif_utmi_quirk"); + device_property_read_u8(dev, "snps,phyif_utmi", + &phyif_utmi); dwc->tx_de_emphasis_quirk = device_property_read_bool(dev, "snps,tx_de_emphasis_quirk"); @@ -940,6 +958,7 @@ static int dwc3_probe(struct platform_device *pdev) &dwc->fladj); dwc->lpm_nyet_threshold = lpm_nyet_threshold; + dwc->phyif_utmi = phyif_utmi; dwc->tx_de_emphasis = tx_de_emphasis; dwc->hird_threshold = hird_threshold diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index f321a5c..cf6696c 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -203,6 +203,12 @@ #define DWC3_GUSB2PHYCFG_SUSPHY (1 << 6) #define DWC3_GUSB2PHYCFG_ULPI_UTMI (1 << 4) #define DWC3_GUSB2PHYCFG_ENBLSLPM (1 << 8) +#define DWC3_GUSB2PHYCFG_PHYIF(n) (n << 3) +#define DWC3_GUSB2PHYCFG_PHYIF_MASK DWC3_GUSB2PHYCFG_PHYIF(1) +#define DWC3_GUSB2PHYCFG_USBTRDTIM(n) (n << 10) +#define DWC3_GUSB2PHYCFG_USBTRDTIM_MASK DWC3_GUSB2PHYCFG_USBTRDTIM(0xf) +#define USBTRDTIM_UTMI_8_BIT 9 +#define USBTRDTIM_UTMI_16_BIT 5 /* Global USB2 PHY Vendor Control Register */ #define DWC3_GUSB2PHYACC_NEWREGREQ (1 << 25) @@ -803,6 +809,10 @@ struct dwc3_scratchpad_array { * @dis_u2_freeclk_exists_quirk : set if we clear u2_freeclk_exists * in GUSB2PHYCFG, specify that USB2 PHY doesn't * provide a free-running PHY clock. + * @phyif_utmi_quirk: set if we enable phyif UTMI+ quirk + * @phyif_utmi: UTMI+ PHY interface value + * 0 - 8 bits + * 1 - 16 bits * @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk * @tx_de_emphasis: Tx de-emphasis value * 0 - -6dB de-emphasis @@ -948,6 +958,8 @@ struct dwc3 { unsigned dis_rxdet_inp3_quirk:1; unsigned dis_u2_freeclk_exists_quirk:1; + unsigned phyif_utmi_quirk:1; + unsigned phyif_utmi:1; unsigned tx_de_emphasis_quirk:1; unsigned tx_de_emphasis:2; };