From patchwork Thu Aug 18 18:56:01 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Douglas Anderson X-Patchwork-Id: 9288607 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1F24D60574 for ; Thu, 18 Aug 2016 18:57:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 029CE29116 for ; Thu, 18 Aug 2016 18:57:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EB1A12912A; Thu, 18 Aug 2016 18:57:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 462AE29116 for ; Thu, 18 Aug 2016 18:57:18 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1baSV9-0003YY-FH; Thu, 18 Aug 2016 18:57:15 +0000 Received: from mail-pf0-x233.google.com ([2607:f8b0:400e:c00::233]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1baSV6-0003LU-Q3 for linux-rockchip@lists.infradead.org; Thu, 18 Aug 2016 18:57:13 +0000 Received: by mail-pf0-x233.google.com with SMTP id x72so898219pfd.2 for ; Thu, 18 Aug 2016 11:56:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id; bh=Ih37A92V8gnjc7Ub/aM7XeqRX72iutg+NS3jPWnm4f4=; b=PqdyTDsp5vujKFWxnTt4MCxwNVmQRyb4rpAU32TVzngdCOupVkGcP3h7WWlou7c+TH iJIBnJSlty5HkgMV1jKcjQtCFeTzA8gSLKMPU/nqsSYSy66HZUG1gACZRvn0HmBGZs2+ ep44WemlGWM+r8nuDF2tghOWA7z7J0GdIRE0o= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=Ih37A92V8gnjc7Ub/aM7XeqRX72iutg+NS3jPWnm4f4=; b=D6gxkgc6RtbOS9MQeFN1P80OuThrhLrH1J8zuZz+Wj8l3ZsJ764+WuCVGWaQovsaS+ TreIJesmUqaIyrdWIiIBq08ZAznPq32GxnZUlLVAwHI227jqQ5POR3N+fiuGMCR3xHID AUgkNiCWIM++NeDSoRbXhaLYtA4WYqJCybGibXqJ/5/3hTOFs7QQZ07bR7DD+Jq6bf1y TL5G1nI3N8FknoZCx6Fh3lOtbf/OTzKubU7692keqhlaKVYlJbg8r9/ZrKWIMJkzKY/B nbBm+Twi2lR7m0hkwlizHNzmZ6zqK0yWbFp/vRO2Cs/lLyMmdBN1O3+H+tAGDMHOVQ2o LLQg== X-Gm-Message-State: AEkooutR3xIe+vpwzfAoISpQFQZIEY5sPQ0yLO0637e9WIQ4ADnYzXcQ/FyyXWtJuzxgrCoO X-Received: by 10.98.158.78 with SMTP id s75mr6638741pfd.137.1471546611558; Thu, 18 Aug 2016 11:56:51 -0700 (PDT) Received: from chromelab4.mtv.corp.google.com ([100.98.62.8]) by smtp.gmail.com with ESMTPSA id e68sm610541pfk.1.2016.08.18.11.56.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 18 Aug 2016 11:56:50 -0700 (PDT) From: Douglas Anderson To: Heiko Stuebner Subject: [PATCH] soc: rockchip: power-domain: Don't (incorrectly) set rk3399 up/down counts Date: Thu, 18 Aug 2016 11:56:01 -0700 Message-Id: <1471546561-4459-1-git-send-email-dianders@chromium.org> X-Mailer: git-send-email 2.8.0.rc3.226.g39d4020 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160818_115712_909324_E584E372 X-CRM114-Status: GOOD ( 15.75 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: zhangqing@rock-chips.com, zhengxing@rock-chips.com, shawn.lin@rock-chips.com, dbasehore@chromium.org, Douglas Anderson , linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, wxt@rock-chips.com MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP On rk3288 it was important that powerdown and powerup counts for the CPU/GPU in the kernel because: * The power on default was crazy long. * We couldn't rely on the firmware to set this up because really this wasn't the firmware's job--the kernel was the only one that really cared about bringing up / down CPUs and the GPU and doing suspend / resume (which involves bringing up / down CPUs). On newer ARM systems (like rk3399) ARM Trusted Firmware is in charge of bringing up and down the CPUs and it really should be in charge of setting all these counts right. After all ATF is in charge of suspend / resume and CPU up / down. Let's get out of the way and let ATF do its job. A few other motivations for doing this: * Depending on another configuration (PMU_24M_EN_CFG) these counts can be either in 24M or 32k cycles. Thus, though ATF isn't really so involved in bringing up the GPU, ATF should probably manage the counts for everything so it can also manage the 24M / 32k choice. * It turns out that (right now) 24M mode is broken on rk3399 and not being used. That means that the count the kernel was programming in (24) was not 1 us (which it seems was intended) but was actually .75 ms * On rk3399 there are actually 2 separate registers for setting CPU up/down time plus 1 register for GPU up/down time. The curent kernel code actually was putting the register for the "little" cores in the "CPU" slot and the register for the "big" cores in the "GPU" slot. It was never initting the GPU counts. Note: this change assumes that ATF will actually set these values at boot, as I'm proposing in . Signed-off-by: Douglas Anderson --- drivers/soc/rockchip/pm_domains.c | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c index 44842a205e4b..91c425d3e66c 100644 --- a/drivers/soc/rockchip/pm_domains.c +++ b/drivers/soc/rockchip/pm_domains.c @@ -583,10 +583,12 @@ static int rockchip_pm_domain_probe(struct platform_device *pdev) * Configure power up and down transition delays for CORE * and GPU domains. */ - rockchip_configure_pd_cnt(pmu, pmu_info->core_pwrcnt_offset, - pmu_info->core_power_transition_time); - rockchip_configure_pd_cnt(pmu, pmu_info->gpu_pwrcnt_offset, - pmu_info->gpu_power_transition_time); + if (pmu_info->core_power_transition_time) + rockchip_configure_pd_cnt(pmu, pmu_info->core_pwrcnt_offset, + pmu_info->core_power_transition_time); + if (pmu_info->gpu_pwrcnt_offset) + rockchip_configure_pd_cnt(pmu, pmu_info->gpu_pwrcnt_offset, + pmu_info->gpu_power_transition_time); error = -ENODEV; @@ -708,11 +710,7 @@ static const struct rockchip_pmu_info rk3399_pmu = { .idle_offset = 0x64, .ack_offset = 0x68, - .core_pwrcnt_offset = 0x9c, - .gpu_pwrcnt_offset = 0xa4, - - .core_power_transition_time = 24, - .gpu_power_transition_time = 24, + /* ARM Trusted Firmware manages power transition times */ .num_domains = ARRAY_SIZE(rk3399_pm_domains), .domain_info = rk3399_pm_domains,