From patchwork Thu Aug 25 08:03:34 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Lin X-Patchwork-Id: 9298903 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8093060757 for ; Thu, 25 Aug 2016 08:08:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 71E7D2920E for ; Thu, 25 Aug 2016 08:08:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 65E6E29211; Thu, 25 Aug 2016 08:08:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C7E952920E for ; Thu, 25 Aug 2016 08:08:44 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bcpiM-0001Vf-MJ; Thu, 25 Aug 2016 08:08:42 +0000 Received: from lucky1.263xmail.com ([211.157.147.133]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bcpiJ-0001QZ-Vl for linux-rockchip@lists.infradead.org; Thu, 25 Aug 2016 08:08:41 +0000 Received: from shawn.lin?rock-chips.com (unknown [192.168.167.139]) by lucky1.263xmail.com (Postfix) with ESMTP id 1294853E2C; Thu, 25 Aug 2016 16:08:09 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 Received: from localhost.localdomain (localhost [127.0.0.1]) by smtp.263.net (Postfix) with ESMTP id 0DCF47AE; Thu, 25 Aug 2016 16:08:07 +0800 (CST) X-RL-SENDER: shawn.lin@rock-chips.com X-FST-TO: bhelgaas@google.com X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: shawn.lin@rock-chips.com X-UNIQUE-TAG: <1f56c9cb05a6073efc3ed8403ba23c61> X-ATTACHMENT-NUM: 0 X-SENDER: lintao@rock-chips.com X-DNS-TYPE: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (Postfix) whith ESMTP id 23852OC45ND; Thu, 25 Aug 2016 16:08:09 +0800 (CST) From: Shawn Lin To: Bjorn Helgaas Subject: [PATCH 1/2] PCI: rockchip: fix broken ASPM due to incorrect L1PwrOnSc/Val Date: Thu, 25 Aug 2016 16:03:34 +0800 Message-Id: <1472112214-31550-1-git-send-email-shawn.lin@rock-chips.com> X-Mailer: git-send-email 1.8.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160825_010840_418411_BA384581 X-CRM114-Status: UNSURE ( 8.03 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-rockchip@lists.infradead.org, Shawn Lin , Brian Norris , linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This is a bug of controller found recently which makes the default values of L1PwrOnSc and L1PwrOnVal unreliable when enabling ASPM. We could work around this by reading L1 substate control 2 register and then write back the value again. Signed-off-by: Shawn Lin --- drivers/pci/host/pcie-rockchip.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index 1671d02..ed782b51 100644 --- a/drivers/pci/host/pcie-rockchip.c +++ b/drivers/pci/host/pcie-rockchip.c @@ -40,6 +40,7 @@ #define PCIE_CLIENT_BASE 0x0 #define PCIE_RC_CONFIG_NORMAL_BASE 0x800000 #define PCIE_RC_CONFIG_BASE 0xa00000 +#define PCIE_RC_CONFIG_L1_SUBSTATE_CTRL2 0x90c #define PCIE_RC_CONFIG_LCSR 0xd0 #define PCIE_RC_CONFIG_LCSR_LBMIE BIT(10) #define PCIE_RC_CONFIG_LCSR_LABIE BIT(11) @@ -477,6 +478,18 @@ static int rockchip_pcie_init_port(struct rockchip_pcie_port *port) return err; } + /* + * We need to read/write PCIE_RC_CONFIG_L1_SUBSTATE_CTRL2 + * before enabling ASPM. Otherwise L1PwrOnSc and L1PwrOnVal isn't + * reliable which makes the controller in broken state when + * enabling ASPM. This is a controller's bug we need to work + * around. + */ + status = pcie_read(port, PCIE_RC_CONFIG_BASE + + PCIE_RC_CONFIG_L1_SUBSTATE_CTRL2); + pcie_write(port, status, PCIE_RC_CONFIG_BASE + + PCIE_RC_CONFIG_L1_SUBSTATE_CTRL2); + /* Enable Gen1 training */ pcie_write(port, HIWORD_UPDATE(PCIE_CLIENT_LINK_TRAIN_ENABLE,