From patchwork Wed Aug 31 01:37:26 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Lin X-Patchwork-Id: 9306223 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B16F6601C0 for ; Wed, 31 Aug 2016 01:43:25 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A0F2B28D25 for ; Wed, 31 Aug 2016 01:43:25 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 955C428DFB; Wed, 31 Aug 2016 01:43:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 22EBB28D25 for ; Wed, 31 Aug 2016 01:43:25 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1beuYm-0000mR-Rc; Wed, 31 Aug 2016 01:43:24 +0000 Received: from lucky1.263xmail.com ([211.157.147.130]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1beuYk-0000i2-NM for linux-rockchip@lists.infradead.org; Wed, 31 Aug 2016 01:43:23 +0000 Received: from shawn.lin?rock-chips.com (unknown [192.168.167.105]) by lucky1.263xmail.com (Postfix) with ESMTP id 609C01EE52B; Wed, 31 Aug 2016 09:42:59 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.263.net (Postfix) with ESMTP id CCC3242D; Wed, 31 Aug 2016 09:42:42 +0800 (CST) X-RL-SENDER: shawn.lin@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: shawn.lin@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-SENDER: lintao@rock-chips.com X-DNS-TYPE: 0 Received: from unknown (unknown [58.22.7.114]) by smtp.263.net (Postfix) whith SMTP id 21943MTK50N; Wed, 31 Aug 2016 09:42:49 +0800 (CST) From: Shawn Lin To: Heiko Stuebner , Rob Herring , Ulf Hansson Subject: [PATCH v2 2/4] mmc: sdhci-of-arasan: Control clock for accessing syscon Date: Wed, 31 Aug 2016 09:37:26 +0800 Message-Id: <1472607448-4462-3-git-send-email-shawn.lin@rock-chips.com> X-Mailer: git-send-email 1.8.0 In-Reply-To: <1472607448-4462-1-git-send-email-shawn.lin@rock-chips.com> References: <1472607448-4462-1-git-send-email-shawn.lin@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160830_184323_128404_FB3E188E X-CRM114-Status: GOOD ( 11.04 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Shawn Lin , Ziyuan Xu , linux-mmc@vger.kernel.org, Douglas Anderson , Adrian Hunter , linux-rockchip@lists.infradead.org MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP In the eariler commit 65820199272d ("Documentation: mmc: sdhci-of-arasan: Add soc-ctl-syscon for corecfg regs"), we introduced syscon to control corecfg_* stuff provided by arasan. But given that we may need to ungate the clock for accessing corecfg_*, it not so perfect as it depends on whether specific clock driver disables it if not referenced. Meanwhile, if we don't need arasan contoller to work anymore, there is no reason to still enable it. So let's control this clock when needed. Signed-off-by: Shawn Lin Tested-by: Ziyuan Xu --- Changes in v2: - assign NULL to clk_syscon if it's not deferral error. drivers/mmc/host/sdhci-of-arasan.c | 33 ++++++++++++++++++++++++++++++--- 1 file changed, 30 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c index 0b3a9cf..3169f81 100644 --- a/drivers/mmc/host/sdhci-of-arasan.c +++ b/drivers/mmc/host/sdhci-of-arasan.c @@ -78,6 +78,7 @@ struct sdhci_arasan_soc_ctl_map { * struct sdhci_arasan_data * @host: Pointer to the main SDHCI host structure. * @clk_ahb: Pointer to the AHB clock + * @clk_syscon: Pointer to the optional clock for accessing syscon * @phy: Pointer to the generic phy * @is_phy_on: True if the PHY is on; false if not. * @sdcardclk_hw: Struct for the clock we might provide to a PHY. @@ -88,6 +89,7 @@ struct sdhci_arasan_soc_ctl_map { struct sdhci_arasan_data { struct sdhci_host *host; struct clk *clk_ahb; + struct clk *clk_syscon; struct phy *phy; bool is_phy_on; @@ -290,6 +292,7 @@ static int sdhci_arasan_suspend(struct device *dev) clk_disable(pltfm_host->clk); clk_disable(sdhci_arasan->clk_ahb); + clk_disable(sdhci_arasan->clk_syscon); return 0; } @@ -309,6 +312,12 @@ static int sdhci_arasan_resume(struct device *dev) struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host); int ret; + ret = clk_enable(sdhci_arasan->clk_syscon); + if (ret) { + dev_err(dev, "Cannot enable syscon clock.\n"); + return ret; + } + ret = clk_enable(sdhci_arasan->clk_ahb); if (ret) { dev_err(dev, "Cannot enable AHB clock.\n"); @@ -528,26 +537,41 @@ static int sdhci_arasan_probe(struct platform_device *pdev) ret); goto err_pltfm_free; } + + sdhci_arasan->clk_syscon = devm_clk_get(&pdev->dev, + "clk_syscon"); + if (IS_ERR(sdhci_arasan->clk_syscon)) { + ret = PTR_ERR(sdhci_arasan->clk_syscon); + if (ret == -EPROBE_DEFER) + goto err_pltfm_free; + else + sdhci_arasan->clk_syscon = NULL; + } + + if (clk_prepare_enable(sdhci_arasan->clk_syscon)) { + dev_err(&pdev->dev, "Unable to enable syscon clock.\n"); + goto err_pltfm_free; + } } sdhci_arasan->clk_ahb = devm_clk_get(&pdev->dev, "clk_ahb"); if (IS_ERR(sdhci_arasan->clk_ahb)) { dev_err(&pdev->dev, "clk_ahb clock not found.\n"); ret = PTR_ERR(sdhci_arasan->clk_ahb); - goto err_pltfm_free; + goto clk_dis_syscon; } clk_xin = devm_clk_get(&pdev->dev, "clk_xin"); if (IS_ERR(clk_xin)) { dev_err(&pdev->dev, "clk_xin clock not found.\n"); ret = PTR_ERR(clk_xin); - goto err_pltfm_free; + goto clk_dis_syscon; } ret = clk_prepare_enable(sdhci_arasan->clk_ahb); if (ret) { dev_err(&pdev->dev, "Unable to enable AHB clock.\n"); - goto err_pltfm_free; + goto clk_dis_syscon; } ret = clk_prepare_enable(clk_xin); @@ -607,6 +631,8 @@ clk_disable_all: clk_disable_unprepare(clk_xin); clk_dis_ahb: clk_disable_unprepare(sdhci_arasan->clk_ahb); +clk_dis_syscon: + clk_disable_unprepare(sdhci_arasan->clk_syscon); err_pltfm_free: sdhci_pltfm_free(pdev); return ret; @@ -631,6 +657,7 @@ static int sdhci_arasan_remove(struct platform_device *pdev) ret = sdhci_pltfm_unregister(pdev); clk_disable_unprepare(clk_ahb); + clk_disable_unprepare(sdhci_arasan->clk_syscon); return ret; }