From patchwork Wed Nov 23 17:29:35 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Kochetkov X-Patchwork-Id: 9443981 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E23616075F for ; Wed, 23 Nov 2016 17:33:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ED9F82679B for ; Wed, 23 Nov 2016 17:33:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E0EC327165; Wed, 23 Nov 2016 17:33:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,FREEMAIL_FROM,RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 92CC22679B for ; Wed, 23 Nov 2016 17:33:19 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1c9bQ6-0008Ms-QB; Wed, 23 Nov 2016 17:33:18 +0000 Received: from mail-lf0-x243.google.com ([2a00:1450:4010:c07::243]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1c9bN3-0005Oy-Jk; Wed, 23 Nov 2016 17:30:12 +0000 Received: by mail-lf0-x243.google.com with SMTP id p100so628283lfg.2; Wed, 23 Nov 2016 09:29:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=5bGGxrQj7/5HEo4D5Of14cGg2eyBIEf/FB/txjkn9Xs=; b=g6yIIF1vZxyHJYINcoGIAFOSIQ+ajiWvVRi0qO1XBrHo5goE8s36h+Qbb6pIAKyRwp ScN9Dk6f3Sl9FfnwJRMn1vQ3l4eyW1WTWVMi66QN+/NWxpDAFtH07kWju3mMkomES7zS 8HM4RRyAVQSlTRILw59hOkVvwDz51uQZkazzKVdH9yPMdroKFf7Kucm9PSjB1wvNfETL VdKZFkno68KQp8VnmbxjrnLEUVcjHUSYxoPnhg8DpS2HZNccPlddFsAUTftbHQgr+dRq C/AQHl738ga0SD8Gs+K3O+4kJJzk2QFehp4XAIkd/SDHuJJdYonB49BXoB8uPtxFgP38 hZ1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=5bGGxrQj7/5HEo4D5Of14cGg2eyBIEf/FB/txjkn9Xs=; b=HxY1ael+TOn0zDz2Y2rEBR+Qs86v8NuG7/9JfMgL2oEx6+FF6PDpMKZVq6auyL5dT2 hn7pRcgEk4f8tPqcqrIj3l1n1a2C07HM5dw8Lrv5setDmiynHz5cDvSE8BnWqNp/B6rd 9TKGGHzpuFjybRu9+whhXgG5CJrMKWIsjgLYDXq2ps+6E9VYTTFhqeL7T6MirRtm3X0r pE9XntZN2QgYGDIWJWVNoQOtvocEGjdHTQKUbF+wR5i4v3rgP+Md/hUByP0SwWFbjct9 yhyRbsJzECJmfgJmhwjbyaOnvVqg8zTwGkWUp+BfDyRhu8Rk0/jObIHuU1AGPVewGV3D fxUQ== X-Gm-Message-State: AKaTC038MxLKzA8FXcbxeTmJAkFAUZ8p6P/oZipA/tnKOwVzrTuIxXYziAjLMW3MsGwvPw== X-Received: by 10.25.162.79 with SMTP id l76mr1230081lfe.14.1479922190226; Wed, 23 Nov 2016 09:29:50 -0800 (PST) Received: from ubuntu.lintech.local ([185.35.119.87]) by smtp.gmail.com with ESMTPSA id h71sm7455138ljh.21.2016.11.23.09.29.48 (version=TLS1_1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 23 Nov 2016 09:29:48 -0800 (PST) From: Alexander Kochetkov To: daniel.lezcano@linaro.org, tglx@linutronix.de, heiko@sntech.de, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH 7/9] clocksource/drivers/rockchip_timer: implement clocksource timer Date: Wed, 23 Nov 2016 20:29:35 +0300 Message-Id: <1479922177-20136-7-git-send-email-al.kochet@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1479922177-20136-1-git-send-email-al.kochet@gmail.com> References: <1479922177-20136-1-git-send-email-al.kochet@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161123_093010_024111_2E4D1261 X-CRM114-Status: GOOD ( 15.46 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexander Kochetkov MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The patch implement stable clocksource for rk3188. It register one of the timers as clocksource and sched_clock. Also it override arm_global_timer clocksource using rating property (350). arm_global_timer enabled on rk3188 provide unstable clocksource. It's rate depend on ARM CPU rate. As result the command 'sleep 60' could run either ~60s (with CPU freq 312 MHZ) or ~45s (with CPU freq 1.6GHz). In order to use the patch you have to setup the timer using 'rockchip,clocksource' device tree property. timer6 was used as clocksource in kernel 3.0 from rockchip SDK. cpufreq-set -f 1.6GHZ date; sleep 60; date Signed-off-by: Alexander Kochetkov --- drivers/clocksource/rockchip_timer.c | 79 +++++++++++++++++++++++++++------- 1 file changed, 63 insertions(+), 16 deletions(-) diff --git a/drivers/clocksource/rockchip_timer.c b/drivers/clocksource/rockchip_timer.c index 61787c5..77bea97 100644 --- a/drivers/clocksource/rockchip_timer.c +++ b/drivers/clocksource/rockchip_timer.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -42,7 +43,13 @@ struct rk_clock_event_device { struct rk_timer timer; }; +struct rk_clocksource { + struct clocksource cs; + struct rk_timer timer; +}; + static struct rk_clock_event_device bc_timer; +static struct rk_clocksource cs_timer; static inline struct rk_clock_event_device* rk_clock_event_device(struct clock_event_device *ce) @@ -139,14 +146,35 @@ static irqreturn_t rk_timer_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } +static cycle_t rk_timer_clocksource_read(struct clocksource *cs) +{ + struct rk_clocksource *_cs = container_of(cs, struct rk_clocksource, cs); + return ~rk_timer_counter_read(&_cs->timer); +} + +static u64 notrace rk_timer_sched_clock_read(void) +{ + struct rk_clocksource *_cs = &cs_timer; + return ~rk_timer_counter_read(&_cs->timer); +} + static int __init rk_timer_init(struct device_node *np, u32 ctrl_reg) { - struct clock_event_device *ce = &bc_timer.ce; - struct rk_timer *timer = &bc_timer.timer; + struct clock_event_device *ce = NULL; + struct clocksource *cs = NULL; + struct rk_timer *timer = NULL; struct clk *timer_clk; struct clk *pclk; int ret = -EINVAL, irq; + if (of_property_read_bool(np, "rockchip,clocksource")) { + cs = &cs_timer.cs; + timer = &cs_timer.timer; + } else { + ce = &bc_timer.ce; + timer = &bc_timer.timer; + } + timer->base = of_iomap(np, 0); if (!timer->base) { pr_err("Failed to get base address for '%s'\n", TIMER_NAME); @@ -189,26 +217,45 @@ static int __init rk_timer_init(struct device_node *np, u32 ctrl_reg) goto out_irq; } - ce->name = TIMER_NAME; - ce->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT | - CLOCK_EVT_FEAT_DYNIRQ; - ce->set_next_event = rk_timer_set_next_event; - ce->set_state_shutdown = rk_timer_shutdown; - ce->set_state_periodic = rk_timer_set_periodic; - ce->irq = irq; - ce->cpumask = cpu_possible_mask; - ce->rating = 250; + if (ce) { + ce->name = TIMER_NAME; + ce->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT | + CLOCK_EVT_FEAT_DYNIRQ; + ce->set_next_event = rk_timer_set_next_event; + ce->set_state_shutdown = rk_timer_shutdown; + ce->set_state_periodic = rk_timer_set_periodic; + ce->irq = irq; + ce->cpumask = cpu_possible_mask; + ce->rating = 250; + } + + if (cs) { + cs->name = TIMER_NAME; + cs->flags = CLOCK_SOURCE_IS_CONTINUOUS; + cs->mask = CLOCKSOURCE_MASK(64); + cs->read = rk_timer_clocksource_read; + cs->rating = 350; + } rk_timer_interrupt_clear(timer); rk_timer_disable(timer); - ret = request_irq(irq, rk_timer_interrupt, IRQF_TIMER, TIMER_NAME, ce); - if (ret) { - pr_err("Failed to initialize '%s': %d\n", TIMER_NAME, ret); - goto out_irq; + if (ce) { + ret = request_irq(irq, rk_timer_interrupt, IRQF_TIMER, TIMER_NAME, ce); + if (ret) { + pr_err("Failed to initialize '%s': %d\n", TIMER_NAME, ret); + goto out_irq; + } + + clockevents_config_and_register(ce, timer->freq, 1, UINT_MAX); } - clockevents_config_and_register(ce, timer->freq, 1, UINT_MAX); + if (cs) { + rk_timer_update_counter(U64_MAX, timer); + rk_timer_enable(timer, 0); + clocksource_register_hz(cs, timer->freq); + sched_clock_register(rk_timer_sched_clock_read, 64, timer->freq); + } return 0;