diff mbox

[2/2] arm64: dts: rockchip: add aspm-no-l0s for rk3399

Message ID 1481881357-1793-2-git-send-email-shawn.lin@rock-chips.com (mailing list archive)
State New, archived
Headers show

Commit Message

Shawn Lin Dec. 16, 2016, 9:42 a.m. UTC
Per the discussion of bug fix[1], we now actually
leaves the default clock choice for pcie phy is
derived from 24MHz OSC to guarantee the least BER.
So let's add aspm-no-l0s here and folks could delete
this property from their dts.

[1] https://patchwork.kernel.org/patch/9470519/
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

---

 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 1 +
 1 file changed, 1 insertion(+)

Comments

Heiko Stübner Jan. 6, 2017, 9:13 a.m. UTC | #1
Hi Shawn,

Am Freitag, 16. Dezember 2016, 17:42:37 CET schrieb Shawn Lin:
> Per the discussion of bug fix[1], we now actually
> leaves the default clock choice for pcie phy is
> derived from 24MHz OSC to guarantee the least BER.
> So let's add aspm-no-l0s here and folks could delete
> this property from their dts.
> 
> [1] https://patchwork.kernel.org/patch/9470519/
> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

looks ok, but the underlying property addition hasn't been included yet, so 
we'll have to wait for a bit longer.

If you notice the pci-host change going in, could you ping this patch please.


Thanks
Heiko
Shawn Lin Jan. 13, 2017, 1:43 a.m. UTC | #2
Hi Heiko,

On 2017/1/6 17:13, Heiko Stuebner wrote:
> Hi Shawn,
>
> Am Freitag, 16. Dezember 2016, 17:42:37 CET schrieb Shawn Lin:
>> Per the discussion of bug fix[1], we now actually
>> leaves the default clock choice for pcie phy is
>> derived from 24MHz OSC to guarantee the least BER.
>> So let's add aspm-no-l0s here and folks could delete
>> this property from their dts.
>>
>> [1] https://patchwork.kernel.org/patch/9470519/
>> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
>
> looks ok, but the underlying property addition hasn't been included yet, so
> we'll have to wait for a bit longer.
>
> If you notice the pci-host change going in, could you ping this patch please.
>
>

yes, it was merged into Bjorn's pci-host yesterday , so could you
kindly pull this one? :)

> Thanks
> Heiko
>
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip
>
Heiko Stübner Jan. 13, 2017, 11:05 a.m. UTC | #3
Am Freitag, 16. Dezember 2016, 17:42:37 CET schrieb Shawn Lin:
> Per the discussion of bug fix[1], we now actually
> leaves the default clock choice for pcie phy is
> derived from 24MHz OSC to guarantee the least BER.
> So let's add aspm-no-l0s here and folks could delete
> this property from their dts.
> 
> [1] https://patchwork.kernel.org/patch/9470519/
> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

applied for 4.11

Thanks
Heiko
diff mbox

Patch

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 0be5f71..1037693 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -282,6 +282,7 @@ 
 		#address-cells = <3>;
 		#size-cells = <2>;
 		#interrupt-cells = <1>;
+		aspm-no-l0s;
 		bus-range = <0x0 0x1>;
 		clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>,
 			 <&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>;