From patchwork Thu Aug 10 11:18:43 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Lin X-Patchwork-Id: 9893313 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8CA9160236 for ; Thu, 10 Aug 2017 11:33:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 802F628AE9 for ; Thu, 10 Aug 2017 11:33:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7347B28AED; Thu, 10 Aug 2017 11:33:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E256928AE9 for ; Thu, 10 Aug 2017 11:33:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=rkejNaG8lbN7PTVGBhgmQU+rtfu1tDQckSrz2nFwGBQ=; b=hZf 7OnQ6C8DkrPyhakiXkBXSDSbXrTXa93SHtFyOOu1lMnoVl1pvn7Jjc5985HanTIwg4QCo56KctxQh iFoYaAT2CRFBR5Rn5je7XQPMd67MesjiwA+dl+CWVdLiPBVJyupgCLNnOY6Wpso38s67FPjr9VZs2 G+xHJ9EI8ptjzl0onKxP4Cl4M1CNbmCvJR64RRDBpgXpNnpQsxZUUwIImDQeqoPNzRXgEpeDBECiJ AiGa54Swl1G3ry1E1hVat75ogYXOv1pGALHpyEcqkfoKRaZajEXGlVROUcBO7/mhe+nSUex1gPI6E Hh++JrOV1FZJf1+XvK0g1ijt8ZemYhA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dfliT-0001Yz-OW; Thu, 10 Aug 2017 11:33:29 +0000 Received: from ca-mx01.263.net ([50.18.194.75] helo=smtphy.263.net) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dflVP-0001LI-0t for linux-rockchip@lists.infradead.org; Thu, 10 Aug 2017 11:20:01 +0000 Received: from transport.263xmail.com (unknown [38.83.106.156]) by smtphy.263.net (Postfix) with ESMTPS id 9101D1200EC for ; Thu, 10 Aug 2017 19:19:36 +0800 (CST) Received: from lucky1.263xmail.com (unknown [192.168.165.181]) by transportlucky.263xmail.com (Postfix) with ESMTP id 176968D09 for ; Thu, 10 Aug 2017 19:19:32 +0800 (CST) Received: from shawn.lin?rock-chips.com (unknown [192.168.167.232]) by lucky1.263xmail.com (Postfix) with ESMTP id 80AD064474; Thu, 10 Aug 2017 19:19:21 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 Received: from localhost.localdomain (localhost [127.0.0.1]) by smtp.263.net (Postfix) with ESMTPA id 1B19E383; Thu, 10 Aug 2017 19:19:22 +0800 (CST) X-RL-SENDER: shawn.lin@rock-chips.com X-FST-TO: bhelgaas@google.com X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: shawn.lin@rock-chips.com X-UNIQUE-TAG: <56581a1ef75f6f7dc8cfdb01baefd155> X-ATTACHMENT-NUM: 0 X-SENDER: lintao@rock-chips.com X-DNS-TYPE: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (Postfix) whith ESMTP id 12194J1E3HQ; Thu, 10 Aug 2017 19:19:22 +0800 (CST) From: Shawn Lin To: Bjorn Helgaas Subject: [PATCH v2] PCI: rockchip: fix system hang up if activating CONFIG_DEBUG_SHIRQ Date: Thu, 10 Aug 2017 19:18:43 +0800 Message-Id: <1502363923-19946-1-git-send-email-shawn.lin@rock-chips.com> X-Mailer: git-send-email 1.9.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170810_041959_212842_E35884FB X-CRM114-Status: UNSURE ( 9.80 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jeffy Chen , Heiko Stuebner , linux-pci@vger.kernel.org, Shawn Lin , Brian Norris , Douglas Anderson , linux-rockchip@lists.infradead.org MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP With CONFIG_DEBUG_SHIRQ enabled, the irq tear down routine would still access the irq handler registed as a shard irq. Per the comment within the function of __free_irq, it says "It's a shared IRQ -- the driver ought to be prepared for an IRQ event to happen even now it's being freed". However when failing to probe the driver, it may disable the clock for accessing the register and the following check for shared irq state would call the irq handler which accesses the register w/o the clk enabled. That will hang the system forever. With adding some dump_stack we could see how that happened. calling rockchip_pcie_driver_init+0x0/0x28 @ 1 rockchip-pcie f8000000.pcie: no vpcie3v3 regulator found rockchip-pcie f8000000.pcie: no vpcie1v8 regulator found rockchip-pcie f8000000.pcie: no vpcie0v9 regulator found rockchip-pcie f8000000.pcie: PCIe link training gen1 timeout! CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.13.0-rc3-next-20170807-ARCH+ #189 Hardware name: Firefly-RK3399 Board (DT) Call trace: [] dump_backtrace+0x0/0x250 [] show_stack+0x20/0x28 [] dump_stack+0x90/0xb0 [] rockchip_pcie_read.isra.11+0x54/0x58 [] rockchip_pcie_client_irq_handler+0x30/0x1a0 [] __free_irq+0x1c8/0x2dc [] free_irq+0x44/0x74 [] devm_irq_release+0x24/0x2c [] release_nodes+0x1d8/0x30c [] devres_release_all+0x3c/0x5c [] driver_probe_device+0x244/0x494 [] __driver_attach+0x120/0x124 [] bus_for_each_dev+0x6c/0xac [] driver_attach+0x2c/0x34 [] bus_add_driver+0x244/0x2b0 [] driver_register+0x70/0x110 [] platform_driver_register+0x60/0x6c [] rockchip_pcie_driver_init+0x20/0x28 [] do_one_initcall+0xc8/0x130 [] kernel_init_freeable+0x1a0/0x238 [] kernel_init+0x18/0x108 [] ret_from_fork+0x10/0x50 In order to fix this, we remove all the clock-disabling from the error handle path and driver's remove function. And replying on the devm_add_action_or_reset to fire the clock-disabling at the appropriate time. Signed-off-by: Shawn Lin --- Changes in v2: - use devm_add_action_or_reset to fix this ordering suggested by Heiko and Jeffy. Thanks! drivers/pci/host/pcie-rockchip.c | 33 +++++++++++++++++---------------- 1 file changed, 17 insertions(+), 16 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index 39aafe2..7713561 100644 --- a/drivers/pci/host/pcie-rockchip.c +++ b/drivers/pci/host/pcie-rockchip.c @@ -939,6 +939,16 @@ static int rockchip_pcie_get_phys(struct rockchip_pcie *rockchip) return 0; } +static void rockchip_pcie_disable_clocks(void *data) +{ + struct rockchip_pcie *rockchip = data; + + clk_disable_unprepare(rockchip->clk_pcie_pm); + clk_disable_unprepare(rockchip->hclk_pcie); + clk_disable_unprepare(rockchip->aclk_perf_pcie); + clk_disable_unprepare(rockchip->aclk_pcie); +} + /** * rockchip_pcie_parse_dt - Parse Device Tree * @rockchip: PCIe port information @@ -1071,6 +1081,9 @@ static int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip) return -EINVAL; } + devm_add_action_or_reset(dev, + rockchip_pcie_disable_clocks, rockchip); + err = devm_request_irq(dev, irq, rockchip_pcie_subsys_irq_handler, IRQF_SHARED, "pcie-sys", rockchip); if (err) { @@ -1493,25 +1506,25 @@ static int rockchip_pcie_probe(struct platform_device *pdev) err = clk_prepare_enable(rockchip->aclk_pcie); if (err) { dev_err(dev, "unable to enable aclk_pcie clock\n"); - goto err_aclk_pcie; + return err; } err = clk_prepare_enable(rockchip->aclk_perf_pcie); if (err) { dev_err(dev, "unable to enable aclk_perf_pcie clock\n"); - goto err_aclk_perf_pcie; + return err; } err = clk_prepare_enable(rockchip->hclk_pcie); if (err) { dev_err(dev, "unable to enable hclk_pcie clock\n"); - goto err_hclk_pcie; + return err; } err = clk_prepare_enable(rockchip->clk_pcie_pm); if (err) { dev_err(dev, "unable to enable hclk_pcie clock\n"); - goto err_pcie_pm; + return err; } err = rockchip_pcie_set_vpcie(rockchip); @@ -1615,14 +1628,6 @@ static int rockchip_pcie_probe(struct platform_device *pdev) if (!IS_ERR(rockchip->vpcie0v9)) regulator_disable(rockchip->vpcie0v9); err_set_vpcie: - clk_disable_unprepare(rockchip->clk_pcie_pm); -err_pcie_pm: - clk_disable_unprepare(rockchip->hclk_pcie); -err_hclk_pcie: - clk_disable_unprepare(rockchip->aclk_perf_pcie); -err_aclk_perf_pcie: - clk_disable_unprepare(rockchip->aclk_pcie); -err_aclk_pcie: return err; } @@ -1644,10 +1649,6 @@ static int rockchip_pcie_remove(struct platform_device *pdev) phy_exit(rockchip->phys[i]); } - clk_disable_unprepare(rockchip->clk_pcie_pm); - clk_disable_unprepare(rockchip->hclk_pcie); - clk_disable_unprepare(rockchip->aclk_perf_pcie); - clk_disable_unprepare(rockchip->aclk_pcie); if (!IS_ERR(rockchip->vpcie12v)) regulator_disable(rockchip->vpcie12v);