diff mbox

[v2] arm64: dts: rockchip: Add cif test clocks for rk3399

Message ID 1515462141-26694-1-git-send-email-zhengsq@rock-chips.com (mailing list archive)
State New, archived
Headers show

Commit Message

Shunqian Zheng Jan. 9, 2018, 1:42 a.m. UTC 
There are three pins can act as cif test clock for rk3399.
They're sourced from 24M and output 24M by default and some boards
may use them as camera 24M xvclk.

Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Reviewed-by: Brian Norris <briannorris@chromium.org>
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

Comments

Heiko Stuebner Jan. 13, 2018, 6:52 p.m. UTC | #1 
Am Dienstag, 9. Januar 2018, 09:42:21 CET schrieb Shunqian Zheng:
> There are three pins can act as cif test clock for rk3399.
> They're sourced from 24M and output 24M by default and some boards
> may use them as camera 24M xvclk.
> 
> Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
> Reviewed-by: Brian Norris <briannorris@chromium.org>

applied for 4.17


Thanks
Heiko
diff mbox

Patch

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 7aa2144..85b30c9 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -2293,6 +2293,23 @@ 
 			};
 		};
 
+		testclk {
+			test_clkout0: test-clkout0 {
+				rockchip,pins =
+					<0 0 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			test_clkout1: test-clkout1 {
+				rockchip,pins =
+					<2 25 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			test_clkout2: test-clkout2 {
+				rockchip,pins =
+					<0 8 RK_FUNC_3 &pcfg_pull_none>;
+			};
+		};
+
 		tsadc {
 			otp_gpio: otp-gpio {
 				rockchip,pins = <1 6 RK_FUNC_GPIO &pcfg_pull_none>;