diff mbox

arm64: dts: rockchip: correct ep-gpios for rk3399-sapphire

Message ID 1518166308-106726-1-git-send-email-shawn.lin@rock-chips.com (mailing list archive)
State New, archived
Headers show

Commit Message

Shawn Lin Feb. 9, 2018, 8:51 a.m. UTC 
The endpoint control gpio for rk3399-sapphire boards is gpio2_a4,
so correct it now.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
---

 arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Heiko Stuebner Feb. 9, 2018, 9:40 a.m. UTC | #1 
Am Freitag, 9. Februar 2018, 09:51:48 CET schrieb Shawn Lin:
> The endpoint control gpio for rk3399-sapphire boards is gpio2_a4,
> so correct it now.
> 
> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

applied as fix for 4.16


Thanks
Heiko
diff mbox

Patch

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
index 0f873c8..ce592a4 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
@@ -457,7 +457,7 @@ 
 	assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
 	assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
 	assigned-clock-rates = <100000000>;
-	ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
+	ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
 	num-lanes = <4>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pcie_clkreqn_cpm>;