Message ID | 1548846209-16406-3-git-send-email-dkos@cadence.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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Wed, 30 Jan 2019 12:04:31 +0100 Received: from lvloginb.cadence.com (localhost [127.0.0.1]) by lvloginb.cadence.com (8.14.4/8.14.4) with ESMTP id x0UB4VbI018087; Wed, 30 Jan 2019 11:04:31 GMT Received: (from dkos@localhost) by lvloginb.cadence.com (8.14.4/8.14.4/Submit) id x0UB4Uj5018077; Wed, 30 Jan 2019 11:04:30 GMT From: Damian Kos <dkos@cadence.com> To: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>, "Rob Herring" <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, "Andrzej Hajda" <a.hajda@samsung.com>, Laurent Pinchart <Laurent.pinchart@ideasonboard.com>, Maarten Lankhorst <maarten.lankhorst@linux.intel.com>, Maxime Ripard <maxime.ripard@bootlin.com>, Sean Paul <sean@poorly.run>, Sandy Huang <hjc@rock-chips.com>, =?utf-8?q?Heiko_St=C3=BCbner?= <heiko@sntech.de>, <dri-devel@lists.freedesktop.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-rockchip@lists.infradead.org> Subject: [PATCH v7 2/4] drm/dp: fix link probing for devices supporting DP 1.4+ Date: Wed, 30 Jan 2019 11:03:19 +0000 Message-ID: <1548846209-16406-3-git-send-email-dkos@cadence.com> X-Mailer: git-send-email 1.9.0 In-Reply-To: <1548846209-16406-1-git-send-email-dkos@cadence.com> References: <1548846209-16406-1-git-send-email-dkos@cadence.com> MIME-Version: 1.0 X-OrganizationHeadersPreserved: maileu3.global.cadence.com X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:158.140.1.28; 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drm: add support for Cadence MHDP DPI/DP bridge.
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diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index 54120b6319e7..4e36d708fdce 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -372,10 +372,38 @@ int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link) { u8 values[3]; int err; + unsigned int addr; memset(link, 0, sizeof(*link)); - err = drm_dp_dpcd_read(aux, DP_DPCD_REV, values, sizeof(values)); + /* + * DP 1.4 introduced a DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT bit in + * DP_TRAINING_AUX_RD_INTERVAL register. If set, DPCD registers from + * DP_DPCD_REV to DP_ADAPTER_CAP should be retrieved starting from + * DP_DPCD_REV_EXTENDED. All registers are copied except DP_DPCD_REV, + * DP_MAX_LINK_RATE and DP_DOWNSTREAMPORT_PRESENT which represent the + * "true capabilities" of DPRX device. + * + * Original DP_DPCD_REV, DP_MAX_LINK_RATE and DP_DOWNSTREAMPORT_PRESENT + * might falsely return lower capabilities to "avoid interoperability + * issues with some of the existing DP Source devices that malfunction + * when they discover the higher capabilities within those three + * registers.". + * + * Before DP 1.4, DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT bit was + * reserved and read 0 so it's safe to check against it even if + * DP revision is <1.4 + */ + err = drm_dp_dpcd_readb(aux, DP_TRAINING_AUX_RD_INTERVAL, values); + if (err < 0) + return err; + + if (values[0] & DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT) + addr = DP_DP13_DPCD_REV; + else + addr = DP_DPCD_REV; + + err = drm_dp_dpcd_read(aux, addr, values, sizeof(values)); if (err < 0) return err;