@@ -83,6 +83,7 @@ static int __set_clk_rates(struct device_node *node, bool clk_supplier)
int rc, index = 0;
struct clk *clk;
u32 rate;
+ bool force = of_property_read_bool(node, "assigned-clock-force-rates");
of_property_for_each_u32(node, "assigned-clock-rates", prop, cur, rate) {
if (rate) {
@@ -105,7 +106,7 @@ static int __set_clk_rates(struct device_node *node, bool clk_supplier)
return PTR_ERR(clk);
}
- rc = clk_set_rate(clk, rate);
+ rc = __clk_set_rate(clk, rate, force);
if (rc < 0)
pr_err("clk: couldn't set %s clock rate: %d\n",
__clk_get_name(clk), rc);
@@ -1528,7 +1528,7 @@ static void clk_change_rate(struct clk *clk)
*
* Returns 0 on success, -EERROR otherwise.
*/
-int clk_set_rate(struct clk *clk, unsigned long rate)
+int __clk_set_rate(struct clk *clk, unsigned long rate, bool force)
{
struct clk *top, *fail_clk;
int ret = 0;
@@ -1540,7 +1540,7 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
clk_prepare_lock();
/* bail early if nothing to do */
- if (rate == clk_get_rate(clk))
+ if (rate == clk_get_rate(clk) && !force)
goto out;
if ((clk->flags & CLK_SET_RATE_GATE) && clk->prepare_count) {
@@ -1573,6 +1573,11 @@ out:
return ret;
}
+
+int clk_set_rate(struct clk *clk, unsigned long rate)
+{
+ return __clk_set_rate(clk, rate, false);
+}
EXPORT_SYMBOL_GPL(clk_set_rate);
/**
@@ -555,6 +555,7 @@ struct clk *__clk_lookup(const char *name);
long __clk_mux_determine_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *best_parent_rate,
struct clk **best_parent_p);
+int __clk_set_rate(struct clk *clk, unsigned long rate, bool force);
/*
* FIXME clock api without lock protection