| Message ID | 1744594109-209312-1-git-send-email-shawn.lin@rock-chips.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | [v3,1/2] PCI: dw-rockchip: Enable L0S capability | expand |
On 2025/4/14 09:28, Shawn Lin wrote: > Iif there is a core reset, _init() is called again, but _pre_init() is > not. > Hi Shawn, Iif ---> If ? The spelling is wrong. Best regards, Hans > Suggested-by: Niklas Cassel <cassel@kernel.org> > Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> > --- > > Changes in v3: None > Changes in v2: None > > drivers/pci/controller/dwc/pcie-dw-rockchip.c | 7 +------ > 1 file changed, 1 insertion(+), 6 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c > index 922aff0..b45af18 100644 > --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c > +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c > @@ -278,17 +278,13 @@ static void rockchip_pcie_ep_hide_broken_ats_cap_rk3588(struct dw_pcie_ep *ep) > dev_err(dev, "failed to hide ATS capability\n"); > } > > -static void rockchip_pcie_ep_pre_init(struct dw_pcie_ep *ep) > -{ > - rockchip_pcie_ep_hide_broken_ats_cap_rk3588(ep); > -} > - > static void rockchip_pcie_ep_init(struct dw_pcie_ep *ep) > { > struct dw_pcie *pci = to_dw_pcie_from_ep(ep); > enum pci_barno bar; > > rockchip_pcie_enable_l0s(pci); > + rockchip_pcie_ep_hide_broken_ats_cap_rk3588(ep); > > for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) > dw_pcie_ep_reset_bar(pci, bar); > @@ -359,7 +355,6 @@ rockchip_pcie_get_features(struct dw_pcie_ep *ep) > > static const struct dw_pcie_ep_ops rockchip_pcie_ep_ops = { > .init = rockchip_pcie_ep_init, > - .pre_init = rockchip_pcie_ep_pre_init, > .raise_irq = rockchip_pcie_raise_irq, > .get_features = rockchip_pcie_get_features, > };
On Mon, Apr 14, 2025 at 09:28:29AM +0800, Shawn Lin wrote: > Iif there is a core reset, _init() is called again, but _pre_init() is > not. I think a better commit message would be: There is no reason to call rockchip_pcie_ep_hide_broken_ats_cap_rk3588() from the pre_init() callback, instead of the normal init() callback. Thus, move the rockchip_pcie_ep_hide_broken_ats_cap_rk3588() call from the pre_init() callback to the init() callback, as: 1) init() will still be called before link training is enabled, so the quirk will still be applied before the host has can see our device. 2) This allows us to remove the pre_init() callback, as it is now unused. 3) It is a more robust design, as the init() callback is called by dw_pcie_ep_init_registers(), which will always be called after a core reset. The pre_init() callback is only called once, at probe time. No functional changes. > > Suggested-by: Niklas Cassel <cassel@kernel.org> > Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Tested-by: Niklas Cassel <cassel@kernel.org> > --- > > Changes in v3: None > Changes in v2: None > > drivers/pci/controller/dwc/pcie-dw-rockchip.c | 7 +------ > 1 file changed, 1 insertion(+), 6 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c > index 922aff0..b45af18 100644 > --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c > +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c > @@ -278,17 +278,13 @@ static void rockchip_pcie_ep_hide_broken_ats_cap_rk3588(struct dw_pcie_ep *ep) > dev_err(dev, "failed to hide ATS capability\n"); > } > > -static void rockchip_pcie_ep_pre_init(struct dw_pcie_ep *ep) > -{ > - rockchip_pcie_ep_hide_broken_ats_cap_rk3588(ep); > -} > - > static void rockchip_pcie_ep_init(struct dw_pcie_ep *ep) > { > struct dw_pcie *pci = to_dw_pcie_from_ep(ep); > enum pci_barno bar; > > rockchip_pcie_enable_l0s(pci); > + rockchip_pcie_ep_hide_broken_ats_cap_rk3588(ep); > > for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) > dw_pcie_ep_reset_bar(pci, bar); > @@ -359,7 +355,6 @@ rockchip_pcie_get_features(struct dw_pcie_ep *ep) > > static const struct dw_pcie_ep_ops rockchip_pcie_ep_ops = { > .init = rockchip_pcie_ep_init, > - .pre_init = rockchip_pcie_ep_pre_init, > .raise_irq = rockchip_pcie_raise_irq, > .get_features = rockchip_pcie_get_features, > }; > -- > 2.7.4 >
diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c index 922aff0..b45af18 100644 --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c @@ -278,17 +278,13 @@ static void rockchip_pcie_ep_hide_broken_ats_cap_rk3588(struct dw_pcie_ep *ep) dev_err(dev, "failed to hide ATS capability\n"); } -static void rockchip_pcie_ep_pre_init(struct dw_pcie_ep *ep) -{ - rockchip_pcie_ep_hide_broken_ats_cap_rk3588(ep); -} - static void rockchip_pcie_ep_init(struct dw_pcie_ep *ep) { struct dw_pcie *pci = to_dw_pcie_from_ep(ep); enum pci_barno bar; rockchip_pcie_enable_l0s(pci); + rockchip_pcie_ep_hide_broken_ats_cap_rk3588(ep); for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) dw_pcie_ep_reset_bar(pci, bar); @@ -359,7 +355,6 @@ rockchip_pcie_get_features(struct dw_pcie_ep *ep) static const struct dw_pcie_ep_ops rockchip_pcie_ep_ops = { .init = rockchip_pcie_ep_init, - .pre_init = rockchip_pcie_ep_pre_init, .raise_irq = rockchip_pcie_raise_irq, .get_features = rockchip_pcie_get_features, };
Iif there is a core reset, _init() is called again, but _pre_init() is not. Suggested-by: Niklas Cassel <cassel@kernel.org> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> --- Changes in v3: None Changes in v2: None drivers/pci/controller/dwc/pcie-dw-rockchip.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-)