From patchwork Thu Sep 1 16:57:58 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Norris X-Patchwork-Id: 9309499 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 26F7560760 for ; Thu, 1 Sep 2016 16:58:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5462D292EF for ; Thu, 1 Sep 2016 16:58:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 48B9C294C8; Thu, 1 Sep 2016 16:58:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C4C9E292EF for ; Thu, 1 Sep 2016 16:58:27 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bfVJq-0000ry-9q; Thu, 01 Sep 2016 16:58:26 +0000 Received: from mail-pf0-x22a.google.com ([2607:f8b0:400e:c00::22a]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bfVJn-0000km-7K for linux-rockchip@lists.infradead.org; Thu, 01 Sep 2016 16:58:24 +0000 Received: by mail-pf0-x22a.google.com with SMTP id h186so33090108pfg.3 for ; Thu, 01 Sep 2016 09:58:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=XdsGwOIVnZ//cYjPe3j/yrM+dbMNMofNVdlmzI/JCtw=; b=cJGEqHSpu+qlqNKxuNEtXYVPs8f5Y6kaZ0dQX4M124pH7+e7MBrGSe8I9W4FJG/5oq 1Kt/WnaTe0AKkppbKbSpfI90vFL93ecZyGczvRs9ubC43AdoftMUhK41MUl8l59AZCpP 1LSpjsOPr9C+3xGfj1AnBu1ixJ6YGzVDy/LCE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=XdsGwOIVnZ//cYjPe3j/yrM+dbMNMofNVdlmzI/JCtw=; b=BU0Nll4cdGFN8GkORai78Edz+tXghE7JZ3QX/3nbgSNFBB7x5BVFgL+EG8B1mLoXYZ 6yAbdTevGGXh4px618/QDO7wchkHyXqREscdtsgIwJod/d0bZzFJSnaFvxpou+m+Oqj+ qF5Ny25AUqqTZgTaADZaVU+fYPrdJw3LyWctnam4v0WPUjVvsvN70ZhthKxNxQK5iiaE CR+m/5tjF4huF8BliSEkJb3B2KubmsU+DKJfmJajJusaYqwgZwvLA4NkOruGpKv2oNwW FYQGikIh2lExcHxdI84EAp2i2O5Gm9d4gUbcby0OrhIiPq8XAea6IHih8zvVR/6gJgzd 5NcQ== X-Gm-Message-State: AE9vXwPe/fION+l4813OP9W0Y4XHPz3Kd3fHPz/2fI0HHDqW5xgVCyw7cMjGTm/+lFYhR6f4 X-Received: by 10.98.144.144 with SMTP id q16mr28497686pfk.98.1472749081463; Thu, 01 Sep 2016 09:58:01 -0700 (PDT) Received: from localhost ([2620:0:1000:1c09:98f8:6d33:df49:65b0]) by smtp.gmail.com with ESMTPSA id t80sm8966418pfj.38.2016.09.01.09.58.00 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Thu, 01 Sep 2016 09:58:00 -0700 (PDT) Date: Thu, 1 Sep 2016 09:57:58 -0700 From: Brian Norris To: Bjorn Helgaas Subject: Re: [v10,2/2] PCI: Rockchip: Add Rockchip PCIe controller support Message-ID: <20160901165757.GA3253@localhost> References: <1471570498-3284-1-git-send-email-shawn.lin@rock-chips.com> <20160831181754.GA7460@roeck-us.net> <9075a2c1-c787-986f-31b4-4d5b7c92b771@rock-chips.com> <20160901163455.GA9471@localhost> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20160901163455.GA9471@localhost> User-Agent: Mutt/1.5.21 (2010-09-15) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160901_095823_376081_55038121 X-CRM114-Status: GOOD ( 13.72 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Heiko Stuebner , Arnd Bergmann , Marc Zyngier , linux-pci@vger.kernel.org, Shawn Lin , Wenrui Li , linux-kernel@vger.kernel.org, Doug Anderson , linux-rockchip@lists.infradead.org, Rob Herring , Bjorn Helgaas , Guenter Roeck Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP On Thu, Sep 01, 2016 at 11:34:55AM -0500, Bjorn Helgaas wrote: > I can't conveniently build it, so I'm sure I've broken things. I Indeed, you have :) > pushed the current work-in-progress branch to pci/host-rockchip-wip. > After we fix build errors and other thinkos, I'll rename it and put it > in -next. I'll append a patch that gets things building and working for me. With that: Tested-by: Brian Norris I haven't examined all the changes in detail, but they mostly seem reasonable. > I'll also post the broken-out patches for the changes I made on top of > the previous v10 (2098142ae87d). I'll eventually squash them all into > the original commit so we don't have the clutter in the logs. diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index 6623598679f2..ac846bab7396 100644 --- a/drivers/pci/host/pcie-rockchip.c +++ b/drivers/pci/host/pcie-rockchip.c @@ -128,9 +128,9 @@ #define PCIE_CLIENT_CONF_ENABLE (0x00010000 | 0x0001) #define PCIE_CLIENT_LINK_TRAIN_ENABLE (0x00020000 | 0x0002) #define PCIE_CLIENT_ARI_ENABLE (0x00080000 | 0x0008) -#define PCIE_CLIENT_CONF_LANE_NUM(x) (0x00300000 | (((x >> 1) & 3) << 4) +#define PCIE_CLIENT_CONF_LANE_NUM(x) (0x00300000 | (((x >> 1) & 3) << 4)) #define PCIE_CLIENT_MODE_RC (0x00400000 | 0x0040) -#define PCIE_CLIENT_GEN_SEL(x) (0x00800000 | ((x & 1) << 7) +#define PCIE_CLIENT_GEN_SEL(x) (0x00800000 | ((x & 1) << 7)) #define PCIE_CLIENT_GEN_SEL_0 0 #define PCIE_CLIENT_GEN_SEL_2 1 @@ -643,14 +643,13 @@ static irqreturn_t rockchip_pcie_client_irq_handler(int irq, void *arg) static void rockchip_pcie_legacy_int_handler(struct irq_desc *desc) { struct irq_chip *chip = irq_desc_get_chip(desc); - struct rockchip_pcie *rockchip; + struct rockchip_pcie *rockchip = irq_desc_get_handler_data(desc); struct device *dev = rockchip->dev; u32 reg; u32 hwirq; u32 virq; chained_irq_enter(chip, desc); - rockchip = irq_desc_get_handler_data(desc); reg = rockchip_pcie_read(rockchip, PCIE_CLIENT_INT_STATUS); reg = (reg & ROCKCHIP_PCIE_RPIFR1_INTR_MASK) >>