From patchwork Fri Jul 21 10:48:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Enric Balletbo i Serra X-Patchwork-Id: 9856497 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BBF14603B4 for ; Fri, 21 Jul 2017 10:49:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B242D28791 for ; Fri, 21 Jul 2017 10:49:11 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A6D57287B6; Fri, 21 Jul 2017 10:49:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, RCVD_IN_DNSWL_NONE, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 38C9C28799 for ; Fri, 21 Jul 2017 10:49:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=/Tdeqh1RUi01uUaDDpPXxqjyx+VFp9haQ26HLK+DCls=; b=Uf8L0lTC66nzEcoihj7NdgaA28 BZbW87cydMgFSv8SI4PZdqEigm9esOdH3+Q2o0g4RvOB/x8of46ZAWlhhBceeLy8C0eHqhvw2K2a1 8YsWH9FHR3zSuKJ+ldnfB6WUw9gXDgoYKtay/V8kAQO3ziULozsOY47+c+RSvQDVPhn7RxMYZ4Wjr 0ZTwU3ZKpS4ZtBjenBosG2h5++PgrkEv+ECqzI54XGULRiAd0HoYwE1YoAkjRWNOxYpFcnyrrEZpg grHeW4aI6rtwa1jmc531OioBw6t4Plswbam7sauVx8zcNMHuXqwTuQs5yXvGt+4418O25Ie67GJE1 j+MZ7TvQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dYVUc-0003PZ-3R; Fri, 21 Jul 2017 10:49:10 +0000 Received: from bhuna.collabora.co.uk ([46.235.227.227]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dYVUR-0003KZ-LS for linux-rockchip@lists.infradead.org; Fri, 21 Jul 2017 10:49:07 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id 990E526C4DD From: Enric Balletbo i Serra To: Thierry Reding , Lee Jones , Daniel Thompson , Jingoo Han , Bartlomiej Zolnierkiewicz , Rob Herring , Pavel Machek , Richard Purdie , Jacek Anaszewski , Heiko Stuebner Subject: [PATCH v4 4/5] ARM: dts: rockchip: set PWM delay backlight settings for Veyron. Date: Fri, 21 Jul 2017 12:48:12 +0200 Message-Id: <20170721104813.5389-4-enric.balletbo@collabora.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170721104813.5389-1-enric.balletbo@collabora.com> References: <20170721104813.5389-1-enric.balletbo@collabora.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170721_034859_876672_CCBC0503 X-CRM114-Status: UNSURE ( 9.38 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: groeck@chromium.org, linux-pwm@vger.kernel.org, linux-fbdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP For veyron the binding should provide both PWM timings, the delay between you enable the PWM and set the enable signal, and the delay between you disable the PWM signal and clear the enable signal. Update the binding accordingly, in this case the panels connected to the veyron boards have a symmetric power sequence, hence the same value is used. Signed-off-by: Enric Balletbo i Serra --- Changes since v3: - Use new -ms names for proprieties. Changes since v2: - Use new names for proprieties. Changes since v1: - Add this new patch to fix current binding on veyron. arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi index d752a31..5a8c7f3 100644 --- a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi +++ b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi @@ -96,7 +96,8 @@ pinctrl-names = "default"; pinctrl-0 = <&bl_en>; pwms = <&pwm0 0 1000000 0>; - pwm-delay-us = <10000>; + post-pwm-on-delay-ms = <10>; + pwm-off-delay-ms = <10>; }; gpio-charger {