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[80.198.72.241]) by smtp.gmail.com with ESMTPSA id 95sm2702374lja.20.2018.02.27.10.28.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 27 Feb 2018 10:28:53 -0800 (PST) From: Vicente Bergas To: Shawn Lin , =?UTF-8?q?Heiko=20St=C3=BCbner?= , linux-rockchip@lists.infradead.org Subject: [PATCH] arm64: dts: rockchip: remove PCIe assigned-clocks in excavator baseboard Date: Tue, 27 Feb 2018 19:28:22 +0100 Message-Id: <20180227182822.5048-1-vicencb@gmail.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: <86b701f0-899f-acf6-ad32-541dc888ddfe@rock-chips.com> References: <86b701f0-899f-acf6-ad32-541dc888ddfe@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180227_102908_155666_609986F6 X-CRM114-Status: UNSURE ( 8.04 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vicente Bergas MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Reference clock is needed for pcie_phy, not pcie controller. Actually pcie_phy doesn't need this since rk3399 clock driver already take care of this. Signed-off-by: Vicente Bergas Suggested-by: Shawn Lin Reviewed-by: Shawn Lin --- arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts | 3 --- 1 file changed, 3 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts b/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts index 4d47150d6862..3d7179aba3fb 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts @@ -195,9 +195,6 @@ }; &pcie0 { - assigned-clocks = <&cru SCLK_PCIEPHY_REF>; - assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>; - assigned-clock-rates = <100000000>; ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>; num-lanes = <4>; pinctrl-names = "default";