From patchwork Wed Jun 27 21:14:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Enric Balletbo i Serra X-Patchwork-Id: 10492693 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 66D9B60386 for ; Wed, 27 Jun 2018 21:15:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 66D4D2A18B for ; Wed, 27 Jun 2018 21:15:54 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 597192A1CD; Wed, 27 Jun 2018 21:15:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, MAILING_LIST_MULTI, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C0E532A18B for ; Wed, 27 Jun 2018 21:15:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=PrlaBsFSVeLUS4+cklqp9g4jl5A1TG75UiPDS9N9Xpg=; b=bye9L1avbLoiw+ zp4vH4z5hPG6e0A65wESknysZSJkm93ivd+Dxepo8EJB3Jqm1Gf6nrJddiupo/0dkWjf/3aXS9bJs KnHDQivoZk1PCnM3jPc/2q69fIO04AftOpCKbv9t0YXfLSbzigVSBkex/ZSoYT3uOILz/K+ANoJ7o NC+SaP/dplNsLXoR+uRz6yOhzMvG24Gd9Tb7J5Yv8qu9zv2b7H0ytZH6yLn3nkbqVIsMs9Zb1tHOz EvI1DEICGp0tdmqfQVlM6iWJN5Nz9y5T+FBTomBUvDEoFQ3fjlddAMS4axGSCeG66R8phYH39XN5S RNGQj9x98UeG5O5qVQig==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1fYHn3-0005hc-BF; Wed, 27 Jun 2018 21:15:49 +0000 Received: from bhuna.collabora.co.uk ([46.235.227.227]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1fYHmO-0003ng-MV; Wed, 27 Jun 2018 21:15:17 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id 83AB1263BFB From: Enric Balletbo i Serra To: Sandy Huang , =?UTF-8?q?Heiko=20St=C3=BCbner?= , David Airlie Subject: [RFC RESEND PATCH] drm/rockchip: update cursors asynchronously through atomic. Date: Wed, 27 Jun 2018 23:14:47 +0200 Message-Id: <20180627211447.20927-1-enric.balletbo@collabora.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180627_141509_288804_1AB4D760 X-CRM114-Status: GOOD ( 13.09 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?St=C3=A9phane=20Marchesin?= , Sean Paul , Gustavo Padovan , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Tomasz Figa , linux-rockchip@lists.infradead.org, kernel@collabora.com, linux-arm-kernel@lists.infradead.org Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add support to async updates of cursors by using the new atomic interface for that. Signed-off-by: Enric Balletbo i Serra Reviewed-by: Sean Paul --- I am sending this as RFC because I still don't have a deep knowledge of the hw and I am not sure if the vop_plane_update function can be reused in both cases, atomic_updates and atomic_async_updates. I think that someone with more knowledge should take a look. The patch was tested on a Samsung Chromebook Plus in two ways. 1. Running all igt kms_cursor_legacy and kms_atomic@plane_cursor_legacy tests and see that there is no regression after the patch. 2. Running weston using the atomic API. Best regards, Enric drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 80 ++++++++++++++++----- 1 file changed, 64 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index 53d4afe15278..1eb6bda924af 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -688,8 +688,7 @@ static void vop_plane_atomic_disable(struct drm_plane *plane, spin_unlock(&vop->reg_lock); } -static void vop_plane_atomic_update(struct drm_plane *plane, - struct drm_plane_state *old_state) +static void vop_plane_update(struct drm_plane *plane) { struct drm_plane_state *state = plane->state; struct drm_crtc *crtc = state->crtc; @@ -710,20 +709,6 @@ static void vop_plane_atomic_update(struct drm_plane *plane, bool rb_swap; int format; - /* - * can't update plane when vop is disabled. - */ - if (WARN_ON(!crtc)) - return; - - if (WARN_ON(!vop->is_enabled)) - return; - - if (!state->visible) { - vop_plane_atomic_disable(plane, old_state); - return; - } - obj = rockchip_fb_get_gem_obj(fb, 0); rk_obj = to_rockchip_obj(obj); @@ -794,10 +779,73 @@ static void vop_plane_atomic_update(struct drm_plane *plane, spin_unlock(&vop->reg_lock); } +static void vop_plane_atomic_update(struct drm_plane *plane, + struct drm_plane_state *old_state) +{ + struct drm_plane_state *state = plane->state; + struct vop *vop = to_vop(state->crtc); + + /* + * can't update plane when vop is disabled. + */ + if (WARN_ON(!state->crtc)) + return; + + if (WARN_ON(!vop->is_enabled)) + return; + + if (!state->visible) { + vop_plane_atomic_disable(plane, old_state); + return; + } + + vop_plane_update(plane); +} + +static int vop_plane_atomic_async_check(struct drm_plane *plane, + struct drm_plane_state *state) +{ + struct drm_crtc_state *crtc_state; + + crtc_state = drm_atomic_get_existing_crtc_state(state->state, + state->crtc); + if (WARN_ON(!crtc_state)) + return -EINVAL; + + if (!crtc_state->active) + return -EINVAL; + + if (plane->state->crtc != state->crtc || + plane->state->src_w != state->src_w || + plane->state->src_h != state->src_h || + plane->state->crtc_w != state->crtc_w || + plane->state->crtc_h != state->crtc_h || + !plane->state->fb || + plane->state->fb != state->fb) + return -EINVAL; + + return 0; +} + +static void vop_plane_atomic_async_update(struct drm_plane *plane, + struct drm_plane_state *new_state) +{ + plane->state->src_x = new_state->src_x; + plane->state->src_y = new_state->src_y; + plane->state->crtc_x = new_state->crtc_x; + plane->state->crtc_y = new_state->crtc_y; + plane->state->fb = new_state->fb; + *plane->state = *new_state; + + vop_plane_update(plane); +} + static const struct drm_plane_helper_funcs plane_helper_funcs = { .atomic_check = vop_plane_atomic_check, .atomic_update = vop_plane_atomic_update, .atomic_disable = vop_plane_atomic_disable, + .atomic_async_check = vop_plane_atomic_async_check, + .atomic_async_update = vop_plane_atomic_async_update, }; static const struct drm_plane_funcs vop_plane_funcs = {