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Sun, 25 Nov 2018 13:19:53 -0800 (PST) Received: from localhost.localdomain ([181.220.65.91]) by smtp.gmail.com with ESMTPSA id i33sm28453478qtb.97.2018.11.25.13.19.49 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 25 Nov 2018 13:19:52 -0800 (PST) Received: by localhost.localdomain (sSMTP sendmail emulation); Sun, 25 Nov 2018 19:19:47 -0200 From: Otavio Salvador To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH 06/13] ARM: dts: rv1108: Add GMAC support Date: Sun, 25 Nov 2018 19:19:00 -0200 Message-Id: <20181125211907.9895-6-otavio@ossystems.com.br> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181125211907.9895-1-otavio@ossystems.com.br> References: <20181125211907.9895-1-otavio@ossystems.com.br> MIME-Version: 1.0 Organization: O.S. Systems Software LTDA. X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181125_162007_063660_5E8B5B4E X-CRM114-Status: GOOD ( 11.32 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Rob Herring , Heiko Stuebner , Otavio Salvador Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add GMAC support for RV1108. Signed-off-by: Otavio Salvador --- arch/arm/boot/dts/rv1108.dtsi | 36 +++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi index 4f4275599f7a..c7a26f82655b 100644 --- a/arch/arm/boot/dts/rv1108.dtsi +++ b/arch/arm/boot/dts/rv1108.dtsi @@ -516,6 +516,27 @@ status = "disabled"; }; + gmac: eth@30200000 { + compatible = "rockchip,rv1108-gmac"; + reg = <0x30200000 0x10000>; + rockchip,grf = <&grf>; + interrupts = , + ; + interrupt-names = "macirq", "eth_wake_irq"; + clocks = <&cru SCLK_MAC>, + <&cru SCLK_MAC_RX>, <&cru SCLK_MAC_RX>, + <&cru SCLK_MAC_REF>, <&cru SCLK_MAC_REFOUT>, + <&cru ACLK_GMAC>, <&cru PCLK_GMAC>; + clock-names = "stmmaceth", + "mac_clk_rx", "mac_clk_tx", + "clk_mac_ref", "clk_mac_refout", + "aclk_mac", "pclk_mac"; + phy-mode = "rmii"; + pinctrl-names = "default"; + pinctrl-0 = <&rmii_pins>; + status = "disabled"; + }; + gic: interrupt-controller@32010000 { compatible = "arm,gic-400"; interrupt-controller; @@ -641,6 +662,21 @@ input-enable; }; + gmac { + rmii_pins: rmii-pins { + rockchip,pins = <1 RK_PC5 RK_FUNC_2 &pcfg_pull_none>, + <1 RK_PC3 RK_FUNC_2 &pcfg_pull_none>, + <1 RK_PC4 RK_FUNC_2 &pcfg_pull_none>, + <1 RK_PB2 RK_FUNC_3 &pcfg_pull_none_drv_12ma>, + <1 RK_PB3 RK_FUNC_3 &pcfg_pull_none_drv_12ma>, + <1 RK_PB4 RK_FUNC_3 &pcfg_pull_none_drv_12ma>, + <1 RK_PB5 RK_FUNC_3 &pcfg_pull_none>, + <1 RK_PB6 RK_FUNC_3 &pcfg_pull_none>, + <1 RK_PB7 RK_FUNC_3 &pcfg_pull_none>, + <1 RK_PC2 RK_FUNC_3 &pcfg_pull_none>; + }; + }; + i2c0 { i2c0_xfer: i2c0-xfer { rockchip,pins = <0 RK_PB1 RK_FUNC_1 &pcfg_pull_none_smt>,