Message ID | 20181125211907.9895-8-otavio@ossystems.com.br (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [01/13] ARM: multi_v7_defconfig: Select PHY_ROCKCHIP_INNO_USB2 | expand |
Hi Otavio, Am Sonntag, 25. November 2018, 22:19:02 CET schrieb Otavio Salvador: > According to the Rockchip vendor tree the PMU interrupt number is > 76, so fix it accordingly. > > Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> > Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br> looks ok, especially as the TRM I have doesn't list neither irqs :-) But please explain the second Signed-off by Fabio? If Fabio is the original author, the patch From should reflect that and the Signed-off-by lines should be swapped. As it is now I would expect Fabio being the one sending the patches. Or is it supposed to be a "Co-developed-by:"? See Documentation/process/5.Posting.rst. Thanks Heiko
Hello Heiko, On Mon, Nov 26, 2018 at 3:59 AM Heiko Stuebner <heiko@sntech.de> wrote: > Am Sonntag, 25. November 2018, 22:19:02 CET schrieb Otavio Salvador: > > According to the Rockchip vendor tree the PMU interrupt number is > > 76, so fix it accordingly. > > > > Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> > > Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br> > > looks ok, especially as the TRM I have doesn't list neither irqs :-) > But please explain the second Signed-off by Fabio? > > If Fabio is the original author, the patch From should reflect that > and the Signed-off-by lines should be swapped. As it is now > I would expect Fabio being the one sending the patches. > Or is it supposed to be a "Co-developed-by:"? > See Documentation/process/5.Posting.rst. He works with me and he applied and tested it in our internal tree for our customer. He reviewed and tested this with me, so I'd like to provide him credit as well.
Am Montag, 26. November 2018, 14:36:01 CET schrieb Otavio Salvador: > Hello Heiko, > > On Mon, Nov 26, 2018 at 3:59 AM Heiko Stuebner <heiko@sntech.de> wrote: > > Am Sonntag, 25. November 2018, 22:19:02 CET schrieb Otavio Salvador: > > > According to the Rockchip vendor tree the PMU interrupt number is > > > 76, so fix it accordingly. > > > > > > Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> > > > Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br> > > > > looks ok, especially as the TRM I have doesn't list neither irqs :-) > > But please explain the second Signed-off by Fabio? > > > > If Fabio is the original author, the patch From should reflect that > > and the Signed-off-by lines should be swapped. As it is now > > I would expect Fabio being the one sending the patches. > > Or is it supposed to be a "Co-developed-by:"? > > See Documentation/process/5.Posting.rst. > > He works with me and he applied and tested it in our internal tree for > our customer. He reviewed and tested this with me, so I'd like to > provide him credit as well. Reviewed-by: Tested-by: perhaps then? :-) Heiko
diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi index 7b331766120d..442b749eb2e9 100644 --- a/arch/arm/boot/dts/rv1108.dtsi +++ b/arch/arm/boot/dts/rv1108.dtsi @@ -66,7 +66,7 @@ arm-pmu { compatible = "arm,cortex-a7-pmu"; - interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; }; timer {