From patchwork Wed Apr 10 12:42:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ayaka X-Patchwork-Id: 10893841 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9BBF81390 for ; Wed, 10 Apr 2019 12:43:20 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7D68126B39 for ; Wed, 10 Apr 2019 12:43:20 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 71A42289D7; Wed, 10 Apr 2019 12:43:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id F14D226B39 for ; Wed, 10 Apr 2019 12:43:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Nm8+56ajbVp3dgYbhe4lvemauHLDHII9X0Bpeatnod8=; b=fgh+eIfx9VJPY9 kHsGkIQwljs8M02vQM3HJ8OeSawS4rXof2WbzkzyrojWrLuZRryUxOmlZvJcSKoX1efxTo3f6f+NA AGDf9DTW6KYWT8w/2ZAnsAYd5tOIFKJ1Xh6pQYGNJOga7tBpaCC6eSKCkF+OM7u8GfUFVydtdgyXD urY+1ZDiUhL8rgbbdBuMr9WrhFFoWGMuq1Y5gLYwPzBz73Pu6DJCmXhEqsgRV0tLOkgRPySl7N1Wn 3h2B7jSjHGkojuLbfnLykY2akImYb8xv88+LK01h9klxsg11Cr74LMXK6ZrCnkWQWdZHr4W4H/Zhq 1pnkYVbOslHspYxlHMkQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hECZR-0002z3-MQ; Wed, 10 Apr 2019 12:43:17 +0000 Received: from kozue.soulik.info ([2001:19f0:7000:8404:5054:ff:fe75:428f]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1hECZN-0002um-QX for linux-rockchip@lists.infradead.org; Wed, 10 Apr 2019 12:43:16 +0000 Received: from misaki.sumomo.pri (unknown [IPv6:2001:470:b30d:2:c604:15ff:0:401]) by kozue.soulik.info (Postfix) with ESMTPA id 1500C1014F7; Wed, 10 Apr 2019 21:44:00 +0900 (JST) From: ayaka To: linux-media@vger.kernel.org Subject: [PATCH v3 9/9] arm64: dts: rockchip: add video codec for rk3328 Date: Wed, 10 Apr 2019 20:42:26 +0800 Message-Id: <20190410124226.8612-10-ayaka@soulik.info> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190410124226.8612-1-ayaka@soulik.info> References: <20190410124226.8612-1-ayaka@soulik.info> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190410_054314_124095_0BCF23D8 X-CRM114-Status: GOOD ( 10.50 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: paul.kocialkowski@bootlin.com, maxime.ripard@bootlin.com, joro@8bytes.org, Randy Li , randy.li@rock-chips.com, jernej.skrabec@gmail.com, nicolas@ndufresne.ca, hverkuil@xs4all.nl, linux-rockchip@lists.infradead.org, thomas.petazzoni@bootlin.com, groeck@chromium.org, mchehab@kernel.org, ezequiel@collabora.com, posciak@chromium.org Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Randy Li Having problem with vepu2 The sclk_vdec_core for RKVDEC is in gpll at vendor kernel. Signed-off-by: Randy Li --- arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 32 ++++++ .../arm64/boot/dts/rockchip/rk3328-rock64.dts | 32 ++++++ arch/arm64/boot/dts/rockchip/rk3328.dtsi | 108 +++++++++++++++++- 3 files changed, 170 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts index 8302d86d35c4..c89714f79f93 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts @@ -213,6 +213,18 @@ }; }; +&rkvdec { + status = "okay"; +}; + +&rkvdec_mmu { + status = "okay"; +}; + +&rkvdec_srv { + status = "okay"; +}; + &sdio { bus-width = <4>; cap-sd-highspeed; @@ -269,3 +281,23 @@ &usb_host0_ohci { status = "okay"; }; + +&vdpu { + status = "okay"; +}; + +&vop { + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +}; + +&vpu_mmu { + status = "okay"; +}; + +&vpu_service{ + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts index 2157a528276b..520e444806cc 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts @@ -256,6 +256,14 @@ }; }; +&h265e { + status = "okay"; +}; + +&h265e_mmu { + status = "okay"; +}; + &i2s1 { status = "okay"; @@ -300,6 +308,18 @@ }; }; +&rkvdec { + status = "okay"; +}; + +&rkvdec_mmu { + status = "okay"; +}; + +&rkvdec_srv { + status = "okay"; +}; + &sdmmc { bus-width = <4>; cap-mmc-highspeed; @@ -370,6 +390,10 @@ status = "okay"; }; +&vdpu { + status = "okay"; +}; + &vop { status = "okay"; }; @@ -377,3 +401,11 @@ &vop_mmu { status = "okay"; }; + +&vpu_mmu { + status = "okay"; +}; + +&vpu_service{ + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 55a72abed6e7..9b3f8d22b60a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -573,6 +573,27 @@ resets = <&cru SRST_GPU_A>; }; + venc_srv: venc-srv { + compatible = "rockchip,mpp-service"; + status = "disabled"; + }; + + h265e: h265e@ff330000 { + compatible = "rockchip,hevc-encoder-v1"; + reg = <0x0 0xff330000 0 0x200>; + interrupts = ; + clocks = <&cru ACLK_H265>, <&cru PCLK_H265>, + <&cru SCLK_VENC_CORE>, <&cru SCLK_VENC_DSP>, + <&cru ACLK_RKVENC>, <&cru ACLK_AXISRAM>; + clock-names = "aclk_h265", "pclk_h265", "clk_core", + "clk_dsp", "aclk_venc", "aclk_axi2sram"; + iommus = <&h265e_mmu>; + rockchip,srv = <&venc_srv>; + syscon = <&grf 0x040c 0x8000800 0x80000>; + power-domains = <&power RK3328_PD_HEVC>; + status = "disabled"; + }; + h265e_mmu: iommu@ff330200 { compatible = "rockchip,iommu"; reg = <0x0 0xff330200 0 0x100>; @@ -584,6 +605,25 @@ status = "disabled"; }; + vepu: vepu@ff340000 { + compatible = "rockchip,vpu-encoder-v2"; + reg = <0x0 0xff340000 0x0 0x400>; + interrupts = ; + clocks = <&cru ACLK_H264>, <&cru HCLK_H264>, + <&cru SCLK_VENC_CORE>; + clock-names = "aclk_vcodec", "hclk_vcodec", + "clk_core"; + resets = <&cru SRST_RKVENC_H264_A>, + <&cru SRST_RKVENC_H264_H>; + reset-names = "video_a", "video_h"; + iommus = <&vepu_mmu>; + rockchip,srv = <&venc_srv>; + syscon = <&grf 0x040c 0x8000800 0x80000>; + power-domains = <&power RK3328_PD_HEVC>; + status = "disabled"; + }; + + vepu_mmu: iommu@ff340800 { compatible = "rockchip,iommu"; reg = <0x0 0xff340800 0x0 0x40>; @@ -595,6 +635,42 @@ status = "disabled"; }; + + vpu_service: vdpu-srv { + compatible = "rockchip,mpp-service"; + status = "disabled"; + }; + + vdpu: vpu-decoder@ff350000 { + compatible = "rockchip,vpu-decoder-v2"; + reg = <0x0 0xff350400 0x0 0x400>; + interrupts = ; + interrupt-names = "irq_dec"; + resets = <&cru SRST_VCODEC_A>, <&cru SRST_VCODEC_H>; + reset-names = "video_a", "video_h"; + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; + clock-names = "aclk_vcodec", "hclk_vcodec"; + iommus = <&vpu_mmu>; + power-domains = <&power RK3328_PD_VPU>; + rockchip,srv = <&vpu_service>; + status = "disabled"; + }; + + avsd: avs-decoder@ff351000 { + compatible = "rockchip,avs-decoder-v1"; + reg = <0x0 0xff351000 0x0 0x200>; + interrupts = ; + interrupt-names = "irq_dec"; + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; + clock-names = "aclk_vcodec", "hclk_vcodec"; + resets = <&cru SRST_VCODEC_A>, <&cru SRST_VCODEC_H>; + reset-names = "video_a", "video_h"; + power-domains = <&power RK3328_PD_VPU>; + iommus = <&vpu_mmu>; + rockchip,srv = <&vpu_service>; + status = "disabled"; + }; + vpu_mmu: iommu@ff350800 { compatible = "rockchip,iommu"; reg = <0x0 0xff350800 0x0 0x40>; @@ -606,6 +682,34 @@ status = "disabled"; }; + rkvdec_srv: rkvdec-srv { + compatible = "rockchip,mpp-service"; + status = "disabled"; + }; + + rkvdec: rkvdec@ff36000 { + compatible = "rockchip,video-decoder-v1"; + reg = <0x0 0xff360000 0x0 0x400>; + interrupts = ; + interrupt-names = "irq_dec"; + clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>, + <&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>; + clock-names = "aclk_vcodec", "hclk_vcodec", "clk_cabac", + "clk_core"; + assigned-clocks = <&cru ACLK_RKVDEC_PRE>, <&cru SCLK_VDEC_CORE>; + assigned-clock-parents = <&cru PLL_GPLL>, <&cru PLL_GPLL>; + assigned-clock-rates = <500000000>, <245760000>; + resets = <&cru SRST_VDEC_A>, <&cru SRST_VDEC_H>, + <&cru SRST_VDEC_NIU_A>, <&cru SRST_VDEC_NIU_H>, + <&cru SRST_VDEC_CABAC>, <&cru SRST_VDEC_CORE>; + reset-names = "video_a", "video_h", "niu_a", "niu_h", + "video_cabac", "video_core"; + iommus = <&rkvdec_mmu>; + power-domains = <&power RK3328_PD_VIDEO>; + rockchip,srv = <&rkvdec_srv>; + status = "disabled"; + }; + rkvdec_mmu: iommu@ff360480 { compatible = "rockchip,iommu"; reg = <0x0 0xff360480 0x0 0x40>, <0x0 0xff3604c0 0x0 0x40>; @@ -740,8 +844,8 @@ <15000000>, <15000000>, <300000000>, <100000000>, <400000000>, <100000000>, - <50000000>, <100000000>, - <100000000>, <100000000>, + <50000000>, <300000000>, + <300000000>, <300000000>, <50000000>, <50000000>, <50000000>, <50000000>, <24000000>, <600000000>,