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bh=xKIfWCxHbhwFJ1+b/MwpbnrM3F2wdwu1e4NkzCc5CUM=; b=P1c84Xb1u4U1woVlpHW9pupXRdrtQqNpmsg9O/bFr2i9PubSzTeq94kHKpP7a/YZEm Xfyn+jsPUgkxgVYXzeBMxzQ4UXLUVBJA4DKuUyJSbvGrCBlPoBYioIfFrrADkCYjLKwm x91uun4cbbsBsDxqohUZRau+QjDQgGerlrCbBcbsODu2kATsX/fWpLmL9wjnoi/Nysg3 ZDO8ujTQg1yNjqhKOZ7AR6E01oWv/kTC12yEtuxrMLLKQztoJ8vBkcJn7lZyLOkCT1N+ J8dRAIEtb6Py3ParQziBjc1CMbDut6Lg/Libif5acXUi73y/Lw7RsN6BfZ/syHYWA5Gh NKow== X-Gm-Message-State: APjAAAXB1sNJ+3gN3wFynIiiFF0Gy9gDs3ZgSlzQZWg5RsagCYOEruhi n7MgtMUsmIGBYRCbdA3JLG4= X-Google-Smtp-Source: APXvYqxe6QhezhBCK+opbYcdALZLkgRza3g2v2TvYPzD8jEQ0r9PChlcheUh07eMQCr/Xr7fdkmk7g== X-Received: by 2002:a17:906:2f13:: with SMTP id v19mr30567233eji.17.1555066457744; Fri, 12 Apr 2019 03:54:17 -0700 (PDT) Received: from localhost.localdomain ([2a01:4262:1ab:e::10]) by smtp.gmail.com with ESMTPSA id y71sm2862750ede.21.2019.04.12.03.54.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 12 Apr 2019 03:54:13 -0700 (PDT) From: Emil Renner Berthing To: linux-spi@vger.kernel.org Subject: [PATCH] spi: rockchip: turn down tx dma bursts Date: Fri, 12 Apr 2019 12:53:20 +0200 Message-Id: <20190412105320.2924-1-kernel@esmil.dk> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190412_035419_804851_0104D69F X-CRM114-Status: GOOD ( 12.42 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Heiko Stuebner , linux-kernel@vger.kernel.org, Vicente Bergas , linux-rockchip@lists.infradead.org, Mark Brown , Robin Murphy , linux-arm-kernel@lists.infradead.org, Emil Renner Berthing Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This fixes tx and bi-directional dma transfers on rk3399-gru-kevin. It seems the SPI fifo must have room for 2 bursts when the dma_tx_req signal is generated or it might skip some words. This in turn makes the rx dma channel never complete for bi-directional transfers. Fix it by setting tx burst length to fifo_len / 4 and the dma watermark to fifo_len / 2. However the rk3399 TRM says (sic): "DMAC support incrementing-address burst and fixed-address burst. But in the case of access SPI and UART at byte or halfword size, DMAC only support fixed-address burst and the address must be aligned to word." So this relies on fifo_len being a multiple of 16 such that the burst length (= fifo_len / 4) is a multiple of 4 and the addresses will be word-aligned. Fixes: dcfc861d24ec ("spi: rockchip: adjust dma watermark and burstlen") Signed-off-by: Emil Renner Berthing --- drivers/spi/spi-rockchip.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index 3912526ead66..19f6a76f1c07 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -425,7 +425,7 @@ static int rockchip_spi_prepare_dma(struct rockchip_spi *rs, .direction = DMA_MEM_TO_DEV, .dst_addr = rs->dma_addr_tx, .dst_addr_width = rs->n_bytes, - .dst_maxburst = rs->fifo_len / 2, + .dst_maxburst = rs->fifo_len / 4, }; dmaengine_slave_config(master->dma_tx, &txconf); @@ -526,7 +526,7 @@ static void rockchip_spi_config(struct rockchip_spi *rs, else writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_RXFTLR); - writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_DMATDLR); + writel_relaxed(rs->fifo_len / 2, rs->regs + ROCKCHIP_SPI_DMATDLR); writel_relaxed(0, rs->regs + ROCKCHIP_SPI_DMARDLR); writel_relaxed(dmacr, rs->regs + ROCKCHIP_SPI_DMACR);