From patchwork Fri Jul 17 01:53:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jianqun Xu X-Patchwork-Id: 11668775 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A2AF6138C for ; Fri, 17 Jul 2020 01:53:35 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 78FFF2076D for ; Fri, 17 Jul 2020 01:53:35 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="O28SsxeE" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 78FFF2076D Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=rock-chips.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:References:In-Reply-To:Message-Id:Date:Subject:To: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Q9JWLNJG4I8bSt9E28rO13dtJy/FM9Ph9VTZiq151DM=; b=O28SsxeE48Qg7/vSWDXYAha7/O lRHo6dso2NJ6TIoIKiPoaPuqj/G274k68s5a9sq7s2WB4EA27lyyfz8pclu+KWlDOYUJjqzNzG9EI r4pxjvNr/IMG5av3TZvU++y9/R937I7z/98Bd/51vsdafgM26Y7NCd50a95wWEJYyHInSueufjBPV qYPuD3aBaL2EX0T7xla1FG1bClQP6FkaUiiT5/BNSJ7fp9ZR84Oyr2RmK5IYet5nWVErVyvMFxomQ 2nM2GYMgb6yYEm4oAQgUSUCK1je1lYRve96IpH0fXrSHgy+/CBCRcVPN/tEkqDjyjmyHB5zw+q76e 0hjH9Y/w==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jwFZ5-0005JI-Hm; Fri, 17 Jul 2020 01:53:31 +0000 Received: from lucky1.263xmail.com ([211.157.147.133]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jwFZ2-0005Gb-UU for linux-rockchip@lists.infradead.org; Fri, 17 Jul 2020 01:53:30 +0000 Received: from localhost (unknown [192.168.167.235]) by lucky1.263xmail.com (Postfix) with ESMTP id 44809C5D6B; Fri, 17 Jul 2020 09:53:26 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P26706T140361238066944S1594950804654023_; Fri, 17 Jul 2020 09:53:25 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: <6045a8117473b967c7cacb8c546d06de> X-RL-SENDER: jay.xu@rock-chips.com X-SENDER: xjq@rock-chips.com X-LOGIN-NAME: jay.xu@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 X-System-Flag: 0 From: Jianqun Xu To: heiko@sntech.de, linus.walleij@linaro.org Subject: [PATCH 09/13] pinctrl: rockchip: do codingstyle Date: Fri, 17 Jul 2020 09:53:23 +0800 Message-Id: <20200717015323.14323-1-jay.xu@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200717014908.13914-1-jay.xu@rock-chips.com> References: <20200717014908.13914-1-jay.xu@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200716_215329_810740_BC38099A X-CRM114-Status: UNSURE ( 7.57 ) X-CRM114-Notice: Please train this message. X-Spam-Score: 1.5 (+) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (1.5 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [211.157.147.133 listed in list.dnswl.org] 1.5 RCVD_IN_SORBS_WEB RBL: SORBS: sender is an abusable web server [58.22.7.114 listed in dnsbl.sorbs.net] 0.0 T_SPF_PERMERROR SPF: test of record failed (permerror) 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [211.157.147.133 listed in wl.mailspike.net] X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-rockchip@lists.infradead.org, kever.yang@rock-chips.com, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, david.wu@rock-chips.com, Jianqun Xu MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org Add RK3228 definitions to separate from other SoCs. Signed-off-by: Jianqun Xu --- drivers/pinctrl/pinctrl-rockchip.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c index 44f051af97c6..ec6a1a08f8b1 100644 --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c @@ -1918,6 +1918,9 @@ static void rk3288_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, } #define RK3228_PULL_OFFSET 0x100 +#define RK3228_PULL_BITS_PER_PIN 2 +#define RK3228_PULL_PINS_PER_REG 8 +#define RK3228_PULL_BANK_STRIDE 16 static void rk3228_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, @@ -1927,14 +1930,17 @@ static void rk3228_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, *regmap = info->regmap_base; *reg = RK3228_PULL_OFFSET; - *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; - *reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4); + *reg += bank->bank_num * RK3228_PULL_BANK_STRIDE; + *reg += ((pin_num / RK3228_PULL_PINS_PER_REG) * 4); - *bit = (pin_num % RK3188_PULL_PINS_PER_REG); - *bit *= RK3188_PULL_BITS_PER_PIN; + *bit = (pin_num % RK3228_PULL_PINS_PER_REG); + *bit *= RK3228_PULL_BITS_PER_PIN; } #define RK3228_DRV_GRF_OFFSET 0x200 +#define RK3228_DRV_BITS_PER_PIN 2 +#define RK3228_DRV_PINS_PER_REG 8 +#define RK3228_DRV_BANK_STRIDE 16 static void rk3228_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, @@ -1944,11 +1950,11 @@ static void rk3228_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, *regmap = info->regmap_base; *reg = RK3228_DRV_GRF_OFFSET; - *reg += bank->bank_num * RK3288_DRV_BANK_STRIDE; - *reg += ((pin_num / RK3288_DRV_PINS_PER_REG) * 4); + *reg += bank->bank_num * RK3228_DRV_BANK_STRIDE; + *reg += ((pin_num / RK3228_DRV_PINS_PER_REG) * 4); - *bit = (pin_num % RK3288_DRV_PINS_PER_REG); - *bit *= RK3288_DRV_BITS_PER_PIN; + *bit = (pin_num % RK3228_DRV_PINS_PER_REG); + *bit *= RK3228_DRV_BITS_PER_PIN; } #define RK3308_PULL_OFFSET 0xa0