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Tue, 21 Jul 2020 08:25:20 -0700 (PDT) From: Jagan Teki To: Kever Yang , Philipp Tomsich , Simon Glass Subject: [PATCH v2 06/12] arm64: dts: rockchip: Add PCIe for RockPI N10 Date: Tue, 21 Jul 2020 20:54:40 +0530 Message-Id: <20200721152443.37602-7-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200721152443.37602-1-jagan@amarulasolutions.com> References: <20200721152443.37602-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200721_112523_593064_DB6525F5 X-CRM114-Status: GOOD ( 10.78 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:444 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: U-Boot-Denx , linux-rockchip@lists.infradead.org, linux-amarula , Jagan Teki , Suniel Mahesh Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org This patch adds support to enable PCIe for RockPI N10. Signed-off-by: Jagan Teki Reviewed-by: Kever Yang --- Changes for v2: - none arch/arm/dts/rk3399pro-vmarc-som.dtsi | 40 +++++++++++++++++++++++++-- 1 file changed, 38 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/rk3399pro-vmarc-som.dtsi b/arch/arm/dts/rk3399pro-vmarc-som.dtsi index ebccc4a153..5d087be04a 100644 --- a/arch/arm/dts/rk3399pro-vmarc-som.dtsi +++ b/arch/arm/dts/rk3399pro-vmarc-som.dtsi @@ -11,6 +11,18 @@ / { compatible = "vamrs,rk3399pro-vmarc-som", "rockchip,rk3399pro"; + + vcc3v3_pcie: vcc-pcie-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio4 RK_PD4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pwr>; + regulator-name = "vcc3v3_pcie"; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc5v0_sys>; + }; }; &cpu_l0 { @@ -142,7 +154,8 @@ regulator-min-microvolt = <900000>; regulator-max-microvolt = <900000>; regulator-state-mem { - regulator-off-in-suspend; + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; }; }; @@ -177,7 +190,8 @@ regulator-min-microvolt = <1850000>; regulator-max-microvolt = <1850000>; regulator-state-mem { - regulator-off-in-suspend; + regulator-on-in-suspend; + regulator-suspend-microvolt = <1850000>; }; }; @@ -304,6 +318,22 @@ sdmmc-supply = <&vccio_sd>; }; +&pcie_phy { + status = "okay"; +}; + +&pcie0 { + ep-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; + max-link-speed = <2>; + num-lanes = <4>; + pinctrl-0 = <&pcie_clkreqnb_cpm>; + pinctrl-names = "default"; + vpcie0v9-supply = <&vcca_0v9>; /* VCC_0V9_S0 */ + vpcie1v8-supply = <&vcca_1v8>; /* VCC_1V8_S0 */ + vpcie3v3-supply = <&vcc3v3_pcie>; + status = "okay"; +}; + &pinctrl { hym8563 { hym8563_int: hym8563-int { @@ -311,6 +341,12 @@ }; }; + pcie { + pcie_pwr: pcie-pwr { + rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + pmic { pmic_int_l: pmic-int-l { rockchip,pins = <1 RK_PC2 0 &pcfg_pull_up>;