| Message ID | 20210108110627.3231226-1-heiko@sntech.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: rockchip: fix vopl iommu irq on px30 | expand |
Hi Heiko, On Fri, 2021-01-08 at 12:06 +0100, Heiko Stuebner wrote: > From: Sandy Huang <hjc@rock-chips.com> > > The vop-mmu shares the irq with its matched vop but not the vpu. > > Fixes: 7053e06b1422 ("arm64: dts: rockchip: add core dtsi file for PX30 SoCs") > Signed-off-by: Sandy Huang <hjc@rock-chips.com> > Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com> Thanks, Ezequiel > --- > arch/arm64/boot/dts/rockchip/px30.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi > index 39b54093d858..4f762968f75f 100644 > --- a/arch/arm64/boot/dts/rockchip/px30.dtsi > +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi > @@ -1110,7 +1110,7 @@ vopl_out_lvds: endpoint@1 { > vopl_mmu: iommu@ff470f00 { > compatible = "rockchip,iommu"; > reg = <0x0 0xff470f00 0x0 0x100>; > - interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; > + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "vopl_mmu"; > clocks = <&cru ACLK_VOPL>, <&cru HCLK_VOPL>; > clock-names = "aclk", "iface";
Hi, On Fri 08 Jan 21, 12:06, Heiko Stuebner wrote: > From: Sandy Huang <hjc@rock-chips.com> > > The vop-mmu shares the irq with its matched vop but not the vpu. This is: Reviewed-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> and: Tested-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Thanks! Paul > Fixes: 7053e06b1422 ("arm64: dts: rockchip: add core dtsi file for PX30 SoCs") > Signed-off-by: Sandy Huang <hjc@rock-chips.com> > Signed-off-by: Heiko Stuebner <heiko@sntech.de> > --- > arch/arm64/boot/dts/rockchip/px30.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi > index 39b54093d858..4f762968f75f 100644 > --- a/arch/arm64/boot/dts/rockchip/px30.dtsi > +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi > @@ -1110,7 +1110,7 @@ vopl_out_lvds: endpoint@1 { > vopl_mmu: iommu@ff470f00 { > compatible = "rockchip,iommu"; > reg = <0x0 0xff470f00 0x0 0x100>; > - interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; > + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "vopl_mmu"; > clocks = <&cru ACLK_VOPL>, <&cru HCLK_VOPL>; > clock-names = "aclk", "iface"; > -- > 2.29.2 >
On Fri, 8 Jan 2021 12:06:27 +0100, Heiko Stuebner wrote:
> The vop-mmu shares the irq with its matched vop but not the vpu.
Applied, thanks!
[1/1] arm64: dts: rockchip: fix vopl iommu irq on px30
commit: 656c648354e1561fa4f445b0b3252ec1d24e3951
Best regards,
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index 39b54093d858..4f762968f75f 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -1110,7 +1110,7 @@ vopl_out_lvds: endpoint@1 { vopl_mmu: iommu@ff470f00 { compatible = "rockchip,iommu"; reg = <0x0 0xff470f00 0x0 0x100>; - interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "vopl_mmu"; clocks = <&cru ACLK_VOPL>, <&cru HCLK_VOPL>; clock-names = "aclk", "iface";