diff mbox series

arm64: dts: rockchip: add phandle to timer0 on rk3368

Message ID 20210209103408.2302218-1-heiko@sntech.de (mailing list archive)
State New
Headers show
Series arm64: dts: rockchip: add phandle to timer0 on rk3368 | expand

Commit Message

Heiko Stübner Feb. 9, 2021, 10:34 a.m. UTC
From: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

While the kernel doesn't care su much right now, bootloaders like
u-boot need to refine the node on their side, so to make life easier
for everyone add the timer0 phandle for timer0.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
---
 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Heiko Stübner March 21, 2021, 8:14 p.m. UTC | #1
On Tue, 9 Feb 2021 11:34:08 +0100, Heiko Stuebner wrote:
> While the kernel doesn't care su much right now, bootloaders like
> u-boot need to refine the node on their side, so to make life easier
> for everyone add the timer0 phandle for timer0.

Applied, thanks!

[1/1] arm64: dts: rockchip: add phandle to timer0 on rk3368
      commit: 46f86be0fc6900a13bc27138a72cb7188ef6b4be

Best regards,
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 7af68ec3feae..61b0a2a907f2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -667,7 +667,7 @@  wdt: watchdog@ff800000 {
 		status = "disabled";
 	};
 
-	timer@ff810000 {
+	timer0: timer@ff810000 {
 		compatible = "rockchip,rk3368-timer", "rockchip,rk3288-timer";
 		reg = <0x0 0xff810000 0x0 0x20>;
 		interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;