diff mbox series

[v2,10/12] ARM: dts: rockchip: add vpu node for RK3036

Message ID 20210527154455.358869-11-knaerzche@gmail.com (mailing list archive)
State New, archived
Headers show
Series [v2,01/12] dt-bindings: mfd: syscon: add Rockchip RK3036/RK3228 qos compatibles | expand

Commit Message

Alex Bee May 27, 2021, 3:44 p.m. UTC 
Add the vpu node and the node for the attached iommu for RK3036.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
---

 Changes in v2:
 - added missing patch

 arch/arm/boot/dts/rk3036.dtsi | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index 76ab663eccf7..f01529515ace 100644
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -117,6 +117,27 @@  gpu: gpu@10090000 {
 		status = "disabled";
 	};
 
+	vpu: video-codec@10108000 {
+		compatible = "rockchip,rk3036-vpu";
+		reg = <0x10108000 0x800>;
+		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vdpu";
+		clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
+		clock-names = "aclk", "hclk";
+		iommus = <&vpu_mmu>;
+		power-domains = <&power RK3036_PD_VPU>;
+	};
+
+	vpu_mmu: iommu@10108800 {
+		compatible = "rockchip,iommu";
+		reg = <0x10108800 0x100>;
+		interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
+		clock-names = "aclk", "iface";
+		power-domains = <&power RK3036_PD_VPU>;
+		#iommu-cells = <0>;
+	};
+
 	vop: vop@10118000 {
 		compatible = "rockchip,rk3036-vop";
 		reg = <0x10118000 0x19c>;