Message ID | 20210528170020.26219-5-macroalpha82@gmail.com (mailing list archive) |
---|---|
State | Superseded, archived |
Headers | show |
Series | Add Rockchip SFC(serial flash controller) support | expand |
On 28/05/21 12:00PM, Chris Morgan wrote: > From: Chris Morgan <macromorgan@hotmail.com> > > This enables the Rockchip Serial Flash Controller for the Odroid Go > Advance. Note that while the attached SPI NOR flash and the controller > both support quad read mode, only 2 of the required 4 pins are present. > The rx and tx bus width is set to 2 for this reason. > > Signed-off-by: Chris Morgan <macromorgan@hotmail.com> > --- > .../boot/dts/rockchip/rk3326-odroid-go2.dts | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts > index 49c97f76df77..a72506d7c6ee 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts > +++ b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts > @@ -484,6 +484,22 @@ &sdmmc { > status = "okay"; > }; > > +&sfc { > + #address-cells = <1>; > + #size-cells = <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&sfc_clk &sfc_cs &sfc_bus2>; > + status = "okay"; > + > + nor_flash: xt25f128b@0 { > + reg = <0>; > + compatible = "xtx,xt25f128b","jedec,spi-nor"; Is the generic "jedec,spi-nor" compatible not enough? I think these flash manufacturer specific compatibles are there because of legacy reasons and should be avoided. Try to see if just "jedec,spi-nor" does the trick. > + spi-rx-bus-width = <2>; > + spi-tx-bus-width = <2>; > + spi-max-frequency = <108000000>; > + }; > +}; > + > &tsadc { > status = "okay"; > }; > -- > 2.25.1 >
diff --git a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts index 49c97f76df77..a72506d7c6ee 100644 --- a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts @@ -484,6 +484,22 @@ &sdmmc { status = "okay"; }; +&sfc { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&sfc_clk &sfc_cs &sfc_bus2>; + status = "okay"; + + nor_flash: xt25f128b@0 { + reg = <0>; + compatible = "xtx,xt25f128b","jedec,spi-nor"; + spi-rx-bus-width = <2>; + spi-tx-bus-width = <2>; + spi-max-frequency = <108000000>; + }; +}; + &tsadc { status = "okay"; };