| Message ID | 20210623120001.164920-1-knaerzche@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: rockchip: Add sdmmc_ext for RK3328 | expand |
Hi Alex, make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml On 6/23/21 2:00 PM, Alex Bee wrote: > RK3328 SoC has a fourth mmc controller called SDMMC_EXT. Some > boards have sdio wifi connected to it. In order to use it > one would have to add the pinctrls from sdmmc0ext group which > is done on board level. > > While at that also add the reset controls for the other mmc > controllers. > > Signed-off-by: Alex Bee <knaerzche@gmail.com> > --- > arch/arm64/boot/dts/rockchip/rk3328.dtsi | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi > index da84be6f4715..c13fa2f3f4cd 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi > @@ -858,6 +858,8 @@ sdmmc: mmc@ff500000 { > clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; > fifo-depth = <0x100>; > max-frequency = <150000000>; > + resets = <&cru SRST_MMC0>; > + reset-names = "reset"; > status = "disabled"; > }; > > @@ -870,6 +872,8 @@ sdio: mmc@ff510000 { > clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; > fifo-depth = <0x100>; > max-frequency = <150000000>; > + resets = <&cru SRST_SDIO>; > + reset-names = "reset"; > status = "disabled"; > }; > > @@ -882,6 +886,8 @@ emmc: mmc@ff520000 { > clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; > fifo-depth = <0x100>; > max-frequency = <150000000>; > + resets = <&cru SRST_EMMC>; > + reset-names = "reset"; > status = "disabled"; > }; > > @@ -980,6 +986,20 @@ usb_host0_ohci: usb@ff5d0000 { > status = "disabled"; > }; > > + sdmmc_ext: dwmmc@ff5f0000 { /arch/arm64/boot/dts/rockchip/rk3328-evb.dt.yaml: dwmmc@ff5f0000: $nodename:0: 'dwmmc@ff5f0000' does not match '^mmc(@.*)?$' > + compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; > + reg = <0x0 0xff5f0000 0x0 0x4000>; > + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cru HCLK_SDMMC_EXT>, <&cru SCLK_SDMMC_EXT>, > + <&cru SCLK_SDMMC_EXT_DRV>, <&cru SCLK_SDMMC_EXT_SAMPLE>; > + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; > + fifo-depth = <0x100>; > + max-frequency = <150000000>; > + resets = <&cru SRST_SDMMCEXT>; > + reset-names = "reset"; > + status = "disabled"; > + }; > + > usbdrd3: usb@ff600000 { > compatible = "rockchip,rk3328-dwc3", "snps,dwc3"; > reg = <0x0 0xff600000 0x0 0x100000>; >
On Wed, Jun 23, 2021 at 8:00 PM Alex Bee <knaerzche@gmail.com> wrote: > > RK3328 SoC has a fourth mmc controller called SDMMC_EXT. Some > boards have sdio wifi connected to it. In order to use it > one would have to add the pinctrls from sdmmc0ext group which > is done on board level. > > While at that also add the reset controls for the other mmc > controllers. I recommend splitting this part into a separate patch, and adding an appropriate "Fixes" tag to it. ChenYu
Am Mittwoch, 23. Juni 2021, 15:11:12 CEST schrieb Chen-Yu Tsai: > On Wed, Jun 23, 2021 at 8:00 PM Alex Bee <knaerzche@gmail.com> wrote: > > > > RK3328 SoC has a fourth mmc controller called SDMMC_EXT. Some > > boards have sdio wifi connected to it. In order to use it > > one would have to add the pinctrls from sdmmc0ext group which > > is done on board level. > > > > While at that also add the reset controls for the other mmc > > controllers. > > I recommend splitting this part into a separate patch, and > adding an appropriate "Fixes" tag to it. I'm with you on that. Adding the resets to the existing controllers should be a separate patch. Heiko
Hi Chen-Yu, Heiko, Am 23.06.21 um 15:40 schrieb Heiko Stübner: > Am Mittwoch, 23. Juni 2021, 15:11:12 CEST schrieb Chen-Yu Tsai: >> On Wed, Jun 23, 2021 at 8:00 PM Alex Bee <knaerzche@gmail.com> wrote: >>> RK3328 SoC has a fourth mmc controller called SDMMC_EXT. Some >>> boards have sdio wifi connected to it. In order to use it >>> one would have to add the pinctrls from sdmmc0ext group which >>> is done on board level. >>> >>> While at that also add the reset controls for the other mmc >>> controllers. >> I recommend splitting this part into a separate patch, and >> adding an appropriate "Fixes" tag to it. > I'm with you on that. Adding the resets to the existing controllers > should be a separate patch. Will do. Alex > Heiko > >
Hi Johan, Am 23.06.21 um 14:53 schrieb Johan Jonker: > Hi Alex, > > make ARCH=arm64 dtbs_check > DT_SCHEMA_FILES=Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml > > On 6/23/21 2:00 PM, Alex Bee wrote: >> RK3328 SoC has a fourth mmc controller called SDMMC_EXT. Some >> boards have sdio wifi connected to it. In order to use it >> one would have to add the pinctrls from sdmmc0ext group which >> is done on board level. >> >> While at that also add the reset controls for the other mmc >> controllers. >> >> Signed-off-by: Alex Bee <knaerzche@gmail.com> >> --- >> arch/arm64/boot/dts/rockchip/rk3328.dtsi | 20 ++++++++++++++++++++ >> 1 file changed, 20 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi >> index da84be6f4715..c13fa2f3f4cd 100644 >> --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi >> +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi >> @@ -858,6 +858,8 @@ sdmmc: mmc@ff500000 { >> clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; >> fifo-depth = <0x100>; >> max-frequency = <150000000>; >> + resets = <&cru SRST_MMC0>; >> + reset-names = "reset"; >> status = "disabled"; >> }; >> >> @@ -870,6 +872,8 @@ sdio: mmc@ff510000 { >> clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; >> fifo-depth = <0x100>; >> max-frequency = <150000000>; >> + resets = <&cru SRST_SDIO>; >> + reset-names = "reset"; >> status = "disabled"; >> }; >> >> @@ -882,6 +886,8 @@ emmc: mmc@ff520000 { >> clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; >> fifo-depth = <0x100>; >> max-frequency = <150000000>; >> + resets = <&cru SRST_EMMC>; >> + reset-names = "reset"; >> status = "disabled"; >> }; >> >> @@ -980,6 +986,20 @@ usb_host0_ohci: usb@ff5d0000 { >> status = "disabled"; >> }; >> >> + sdmmc_ext: dwmmc@ff5f0000 { > /arch/arm64/boot/dts/rockchip/rk3328-evb.dt.yaml: dwmmc@ff5f0000: > $nodename:0: 'dwmmc@ff5f0000' does not match '^mmc(@.*)?$' Argh: I submitted the pre-dtbs_check version. Thanks for checking. Alex. >> + compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; >> + reg = <0x0 0xff5f0000 0x0 0x4000>; >> + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; >> + clocks = <&cru HCLK_SDMMC_EXT>, <&cru SCLK_SDMMC_EXT>, >> + <&cru SCLK_SDMMC_EXT_DRV>, <&cru SCLK_SDMMC_EXT_SAMPLE>; >> + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; >> + fifo-depth = <0x100>; >> + max-frequency = <150000000>; >> + resets = <&cru SRST_SDMMCEXT>; >> + reset-names = "reset"; >> + status = "disabled"; >> + }; >> + >> usbdrd3: usb@ff600000 { >> compatible = "rockchip,rk3328-dwc3", "snps,dwc3"; >> reg = <0x0 0xff600000 0x0 0x100000>; >>
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index da84be6f4715..c13fa2f3f4cd 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -858,6 +858,8 @@ sdmmc: mmc@ff500000 { clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; fifo-depth = <0x100>; max-frequency = <150000000>; + resets = <&cru SRST_MMC0>; + reset-names = "reset"; status = "disabled"; }; @@ -870,6 +872,8 @@ sdio: mmc@ff510000 { clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; fifo-depth = <0x100>; max-frequency = <150000000>; + resets = <&cru SRST_SDIO>; + reset-names = "reset"; status = "disabled"; }; @@ -882,6 +886,8 @@ emmc: mmc@ff520000 { clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; fifo-depth = <0x100>; max-frequency = <150000000>; + resets = <&cru SRST_EMMC>; + reset-names = "reset"; status = "disabled"; }; @@ -980,6 +986,20 @@ usb_host0_ohci: usb@ff5d0000 { status = "disabled"; }; + sdmmc_ext: dwmmc@ff5f0000 { + compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; + reg = <0x0 0xff5f0000 0x0 0x4000>; + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru HCLK_SDMMC_EXT>, <&cru SCLK_SDMMC_EXT>, + <&cru SCLK_SDMMC_EXT_DRV>, <&cru SCLK_SDMMC_EXT_SAMPLE>; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + fifo-depth = <0x100>; + max-frequency = <150000000>; + resets = <&cru SRST_SDMMCEXT>; + reset-names = "reset"; + status = "disabled"; + }; + usbdrd3: usb@ff600000 { compatible = "rockchip,rk3328-dwc3", "snps,dwc3"; reg = <0x0 0xff600000 0x0 0x100000>;
RK3328 SoC has a fourth mmc controller called SDMMC_EXT. Some boards have sdio wifi connected to it. In order to use it one would have to add the pinctrls from sdmmc0ext group which is done on board level. While at that also add the reset controls for the other mmc controllers. Signed-off-by: Alex Bee <knaerzche@gmail.com> --- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)