diff mbox series

arm64: dts: rockchip: add saradc node for rk3568.dtsi

Message ID 20210705012610.3831-1-xxm@rock-chips.com (mailing list archive)
State New, archived
Headers show
Series arm64: dts: rockchip: add saradc node for rk3568.dtsi | expand

Commit Message

Simon Xue July 5, 2021, 1:26 a.m. UTC 
Signed-off-by: Simon Xue <xxm@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3568.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

Comments

Heiko Stuebner July 17, 2021, 9:52 p.m. UTC | #1 
On Mon, 5 Jul 2021 09:26:10 +0800, Simon Xue wrote:
> 


Applied, thanks!

[1/1] arm64: dts: rockchip: add saradc node for rk3568.dtsi
      commit: 3d3377027027b3f5a7447bc147fb9dfabfad9369

Best regards,
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
index d225e6a45d5c..16621ecbb876 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
@@ -525,6 +525,18 @@  uart9: serial@fe6d0000 {
 		status = "disabled";
 	};
 
+	saradc: saradc@fe720000 {
+		compatible = "rockchip,rk3568-saradc", "rockchip,rk3399-saradc";
+		reg = <0x0 0xfe720000 0x0 0x100>;
+		interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>;
+		clock-names = "saradc", "apb_pclk";
+		resets = <&cru SRST_P_SARADC>;
+		reset-names = "saradc-apb";
+		#io-channel-cells = <1>;
+		status = "disabled";
+	};
+
 	pinctrl: pinctrl {
 		compatible = "rockchip,rk3568-pinctrl";
 		rockchip,grf = <&grf>;