From patchwork Mon Sep 27 17:59:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Brian Norris X-Patchwork-Id: 12520535 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7C18DC433FE for ; Mon, 27 Sep 2021 18:00:40 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 398E5604E9 for ; Mon, 27 Sep 2021 18:00:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 398E5604E9 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=4YgcYqUbRFqaJEEJgCxUd+1bV8XU8aMvrtUqKLrHm6c=; b=sWzUi2kP+zd26v g7Cy7C3OfbqOEx3iXDZhH6HugVf0NnEBifrkjCyucMHWZ3oOBMjG2Vy/XGZtPdPO1v6rpZRhZFd9m 1hlaK46hl7H9h/M8obapSLNq6tGkVNlvbgZIGCEn2y+UPpNQr9n0jiHs9+1f2GVk4ej7uc2bhjnqF cuKLcORFRnIWkrYxz9SDkG/pJ+BMc/WOhpbspp0Nz1uc87PNcWZJUl8bf4IGbPXLSKS3l0UY5Nzar ioQw2cjTh1/kCizf3IZmpd/0iogFVFBybl2+dAcbuN0gZDc9e9Pg3NETBwHgZGgxtn4nXN02vE/bV JmStXXd6YwbqJfjNUONw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mUuva-003iA7-3B; Mon, 27 Sep 2021 18:00:34 +0000 Received: from mail-pf1-x42a.google.com ([2607:f8b0:4864:20::42a]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mUuvV-003i4t-Vf for linux-rockchip@lists.infradead.org; Mon, 27 Sep 2021 18:00:32 +0000 Received: by mail-pf1-x42a.google.com with SMTP id g2so12484998pfc.6 for ; Mon, 27 Sep 2021 11:00:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yXcjXLEUU3nildNYoxMEqnc4/GAMyWaGrIeKlsoekxA=; b=eO4zMx8OK7l/Fm2RzIja0dJMHLRaZVs+qdiiZALORr4ePn7i4YzxTulZJFJ7zcM3OI 8AforHwrwN7yvarhMfLRs88sMEYRL3kJgwJXr41UcM2LJjtmaIKFmY1jR7W/tjrZx/UB hC2NGRNozfO8MeVjYXwzIR9mjAQDVfVRN0kNg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yXcjXLEUU3nildNYoxMEqnc4/GAMyWaGrIeKlsoekxA=; b=BhwA6tmpdmOY/GD6fQHflU61mpN9wI5G8djUDi35kAkZO0QvFeObtagMzHYlGR9wQA /4BF/nRpn2WVTN3Xvx4PXXlPwq+LchUs772ZrV6z8/inyR6mKe/GYJlHEkry6or+nZ4Y oGg8FLYLqQPEl6DpmDtAwvxCFqkv6Q20V42ehGda3pLadu1+/0ChPdrqeNFu1jQooOUT UwZm94Mr5GKSbbl62d+vRE/hQQ5PQ7eCFyOvC8PRDGDHQ8C5GMiskCMt0JjJsqeDtgNO W61x8kdXGJmBYpDXx+knRafKHwxUVFy+KLE1G8pYgqZMQHz19T36+VGaxAQOe8qtsVZJ jBYA== X-Gm-Message-State: AOAM530aOU4NF2JEHtBPrPWs7h21qs7z+oHDW9BrzDvzSxkrq2hWkFEK PdI3wLWMcvGRTaLXcxXnu/RC/w== X-Google-Smtp-Source: ABdhPJzM6DN9j/wrGa72mB8jLhaCKul3eWC8j2VmrO3BGILG46pb9iWJWPOeyJI5sfh/OVJ13Gl1hw== X-Received: by 2002:a62:1409:0:b0:447:a1bf:9f44 with SMTP id 9-20020a621409000000b00447a1bf9f44mr959209pfu.76.1632765621703; Mon, 27 Sep 2021 11:00:21 -0700 (PDT) Received: from localhost ([2620:15c:202:201:82d7:f099:76bc:7017]) by smtp.gmail.com with UTF8SMTPSA id w13sm116228pjc.29.2021.09.27.11.00.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 27 Sep 2021 11:00:21 -0700 (PDT) From: Brian Norris To: =?utf-8?q?Heiko_St=C3=BCbner?= Cc: Thomas Hebb , dri-devel@lists.freedesktop.org, Chen-Yu Tsai , linux-rockchip@lists.infradead.org, Sandy Huang , linux-kernel@vger.kernel.org, Brian Norris , aleksandr.o.makarov@gmail.com, stable@vger.kernel.org, =?utf-8?q?N=C3=ADcolas_F_=2E_R_=2E_A_=2E_Prado?= Subject: [PATCH v2 1/3] drm/rockchip: dsi: Hold pm-runtime across bind/unbind Date: Mon, 27 Sep 2021 10:59:42 -0700 Message-Id: <20210927105928.v2.1.Ic2904d37f30013a7f3d8476203ad3733c186827e@changeid> X-Mailer: git-send-email 2.33.0.685.g46640cef36-goog In-Reply-To: <20210927175944.3381314-1-briannorris@chromium.org> References: <20210927175944.3381314-1-briannorris@chromium.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210927_110030_030957_92DB56E7 X-CRM114-Status: GOOD ( 20.20 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org In commit 43c2de1002d2, we moved most HW configuration to bind(), but we didn't move the runtime PM management. Therefore, depending on initial boot state, runtime-PM workqueue delays, and other timing factors, we may disable our power domain in between the hardware configuration (bind()) and when we enable the display. This can cause us to lose hardware state and fail to configure our display. For example: dw-mipi-dsi-rockchip ff968000.mipi: failed to write command FIFO panel-innolux-p079zca ff960000.mipi.0: failed to write command 0 or: dw-mipi-dsi-rockchip ff968000.mipi: failed to write command FIFO panel-kingdisplay-kd097d04 ff960000.mipi.0: failed write init cmds: -110 We should match the runtime PM to the lifetime of the bind()/unbind() cycle. Tested on Acer Chrometab 10 (RK3399 Gru-Scarlet), with panel drivers built either as modules or built-in. Side notes: it seems one is more likely to see this problem when the panel driver is built into the kernel. I've also seen this problem bisect down to commits that simply changed Kconfig dependencies, because it changed the order in which driver init functions were compiled into the kernel, and therefore the ordering and timing of built-in device probe. Fixes: 43c2de1002d2 ("drm/rockchip: dsi: move all lane config except LCDC mux to bind()") Link: https://lore.kernel.org/linux-rockchip/9aedfb528600ecf871885f7293ca4207c84d16c1.camel@gmail.com/ Reported-by: Cc: Signed-off-by: Brian Norris Tested-by: Nícolas F. R. A. Prado Reviewed-by: Thomas Hebb --- Changes in v2: - Clean up pm-runtime state in error cases. - Correct git hash for Fixes. .../gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 37 ++++++++++--------- 1 file changed, 19 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c index a2262bee5aa4..45676b23c019 100644 --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c @@ -773,10 +773,6 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder) if (mux < 0) return; - pm_runtime_get_sync(dsi->dev); - if (dsi->slave) - pm_runtime_get_sync(dsi->slave->dev); - /* * For the RK3399, the clk of grf must be enabled before writing grf * register. And for RK3288 or other soc, this grf_clk must be NULL, @@ -795,20 +791,10 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder) clk_disable_unprepare(dsi->grf_clk); } -static void dw_mipi_dsi_encoder_disable(struct drm_encoder *encoder) -{ - struct dw_mipi_dsi_rockchip *dsi = to_dsi(encoder); - - if (dsi->slave) - pm_runtime_put(dsi->slave->dev); - pm_runtime_put(dsi->dev); -} - static const struct drm_encoder_helper_funcs dw_mipi_dsi_encoder_helper_funcs = { .atomic_check = dw_mipi_dsi_encoder_atomic_check, .enable = dw_mipi_dsi_encoder_enable, - .disable = dw_mipi_dsi_encoder_disable, }; static int rockchip_dsi_drm_create_encoder(struct dw_mipi_dsi_rockchip *dsi, @@ -938,10 +924,14 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev, put_device(second); } + pm_runtime_get_sync(dsi->dev); + if (dsi->slave) + pm_runtime_get_sync(dsi->slave->dev); + ret = clk_prepare_enable(dsi->pllref_clk); if (ret) { DRM_DEV_ERROR(dev, "Failed to enable pllref_clk: %d\n", ret); - return ret; + goto out_pm_runtime; } /* @@ -953,7 +943,7 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev, ret = clk_prepare_enable(dsi->grf_clk); if (ret) { DRM_DEV_ERROR(dsi->dev, "Failed to enable grf_clk: %d\n", ret); - return ret; + goto out_pm_runtime; } dw_mipi_dsi_rockchip_config(dsi); @@ -965,16 +955,23 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev, ret = rockchip_dsi_drm_create_encoder(dsi, drm_dev); if (ret) { DRM_DEV_ERROR(dev, "Failed to create drm encoder\n"); - return ret; + goto out_pm_runtime; } ret = dw_mipi_dsi_bind(dsi->dmd, &dsi->encoder); if (ret) { DRM_DEV_ERROR(dev, "Failed to bind: %d\n", ret); - return ret; + goto out_pm_runtime; } return 0; + +out_pm_runtime: + pm_runtime_put(dsi->dev); + if (dsi->slave) + pm_runtime_put(dsi->slave->dev); + + return ret; } static void dw_mipi_dsi_rockchip_unbind(struct device *dev, @@ -989,6 +986,10 @@ static void dw_mipi_dsi_rockchip_unbind(struct device *dev, dw_mipi_dsi_unbind(dsi->dmd); clk_disable_unprepare(dsi->pllref_clk); + + pm_runtime_put(dsi->dev); + if (dsi->slave) + pm_runtime_put(dsi->slave->dev); } static const struct component_ops dw_mipi_dsi_rockchip_ops = {