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Thu, 16 Dec 2021 03:13:34 -0800 (PST) Received: from aford-IdeaCentre-A730.lan ([2601:448:8400:9e8:fe22:1652:55f7:5197]) by smtp.gmail.com with ESMTPSA id h1sm3090946iow.31.2021.12.16.03.13.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Dec 2021 03:13:33 -0800 (PST) From: Adam Ford To: linux-media@vger.kernel.org Cc: abel.vesa@nxp.com, aford@beaconembedded.com, benjamin.gaignard@collabora.com, hverkuil-cisco@xs4all.nl, Adam Ford , Ezequiel Garcia , Philipp Zabel , Mauro Carvalho Chehab , Rob Herring , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Greg Kroah-Hartman , Lucas Stach , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev Subject: [PATCH V2 08/10] dt-bindings: media: nxp, imx8mq-vpu: Add support for G1 and G2 on imx8mm Date: Thu, 16 Dec 2021 05:12:53 -0600 Message-Id: <20211216111256.2362683-9-aford173@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211216111256.2362683-1-aford173@gmail.com> References: <20211216111256.2362683-1-aford173@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211216_031335_270984_D3118B12 X-CRM114-Status: GOOD ( 10.07 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org The i.MX8M mini appears to have a similar G1 and G2 decoder but the post-procesing isn't present, so different compatible flags are requred. Since all the other parameters are the same with imx8mq, just add the new compatible flags to nxp,imx8mq-vpu.yaml. Signed-off-by: Adam Ford diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml index c1e157251de7..b1f24c48c73b 100644 --- a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml +++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml @@ -5,7 +5,7 @@ $id: "http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml#" $schema: "http://devicetree.org/meta-schemas/core.yaml#" -title: Hantro G1/G2 VPU codecs implemented on i.MX8MQ SoCs +title: Hantro G1/G2 VPU codecs implemented on i.MX8MQ/i.MX8MM SoCs maintainers: - Philipp Zabel @@ -20,6 +20,8 @@ properties: deprecated: true - const: nxp,imx8mq-vpu-g1 - const: nxp,imx8mq-vpu-g2 + - const: nxp,imx8mm-vpu-g1 + - const: nxp,imx8mm-vpu-g2 reg: maxItems: 1 @@ -66,3 +68,27 @@ examples: clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>; power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G2>; }; + - | + #include + #include + #include + + vpu_g1: video-codec@38300000 { + compatible = "nxp,imx8mm-vpu-g1"; + reg = <0x38300000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MM_CLK_VPU_G1_ROOT>; + power-domains = <&vpu_blk_ctrl IMX8MM_VPUBLK_PD_G1>; + }; + - | + #include + #include + #include + + vpu_g2: video-codec@38300000 { + compatible = "nxp,imx8mm-vpu-g2"; + reg = <0x38310000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MM_CLK_VPU_G2_ROOT>; + power-domains = <&vpu_blk_ctrl IMX8MM_VPUBLK_PD_G2>; + };