From patchwork Thu Jan 27 23:07:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Brian Norris X-Patchwork-Id: 12727529 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 825EEC433EF for ; Thu, 27 Jan 2022 23:16:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=EcratEL2+Ww/arSOSRSiusrY7Q2LhAn+iM7ib1XkAX4=; b=C+7i7d9jlzB82A mGjC4fWaGplYBPr27PvB6lRCiDP/b+yYnyP0ltvCzTT7cfpZuVyWS/u0Mg99ET3pY1ve+4DmsBPuc 0DlAIXJTxRb/ADf2pM8GfhnvDJ9SAyOgFzzP8jmicCwx8qQ0ib00KTDg6ga/4unryypLS81lxa8ij kL6bZ3P5Ke8AhOdAOjzTXYHK1W3nZ+fnylJU2zoiUq6JAFsjjM9hx6keImfJI08IWL5CbzTDkmc4N CsBBLksQvpt+RsrPpNWxJzGDKuzLeiEuWAgLWifxLEB1RfEZ96iVxudbP914W0pM+UmtyZgM5TMAW YESvFBwidvhSLj4u7imQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nDDzx-00HJzn-G4; Thu, 27 Jan 2022 23:16:13 +0000 Received: from mail-pf1-x429.google.com ([2607:f8b0:4864:20::429]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nDDsn-00HGUV-1u for linux-rockchip@lists.infradead.org; Thu, 27 Jan 2022 23:08:51 +0000 Received: by mail-pf1-x429.google.com with SMTP id i30so4359166pfk.8 for ; Thu, 27 Jan 2022 15:08:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=H3WPdl8RHDSD1wX3WYrqIIpaKS0otWy1CXBFRdtFIp0=; b=MI68bzzOlftwsLGrBYAOzyCTdVT7/DjY0G28T/dktb1p+eyNQg3lJ38XqA+02nrBSc MlpQ+bwattyukKMVxifDcCRAefoXuFGzT6ODOCQjr3VmwTb1WTYp7pMoDJmFVXvaU0gx GIYMCkunM9HKsSMPediCjBTpAmV/CiExCjGxo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=H3WPdl8RHDSD1wX3WYrqIIpaKS0otWy1CXBFRdtFIp0=; b=o6Q3GWUt9AcFka+W+Cgxy9dhpuz0H9qdn/vusTGOkYacfxFYIuOR+SxNNEEouaU+Wm aJjPnL3BTp3FJ2Ohu8a6VqGtlxNwu+nnUpxGvzvjPpFnE/OLpArUWrwGAvfPdwUhHPXm /t8PqaT9gXo9K+nxkC7m74fnJ1r6/ZmdqUT6Ucu1K8EaDVpVmvb4T082IEUTiuk8vIEI fASaR5Yx0c83TlTiEWO4Xsv9mTfB0sWD1c9q5PW43xVYXqymnILbIrAhPueg8xfQwbdY v+fqEtIWtwNlcOikBqqjXHgzfDpdQLaP2QwVBcAWBzklBvjrYRrFAwM27C+pq3+8nF9K 1cXg== X-Gm-Message-State: AOAM531oD4U8rBo4BtfYhSZ92ibwwIQQ/kGOnx1IWoS1V1SB8jZTEjwv G5qUTrBpbv/a6HRaJmL6oljnCg== X-Google-Smtp-Source: ABdhPJxHGKBFiprBfzF/G3/1M/XaUir6+M8cdNjBdHlepR+kl6Wvt2iHAswSxIZ9FoocWQX1BCjKkw== X-Received: by 2002:a63:245:: with SMTP id 66mr2604212pgc.349.1643324927837; Thu, 27 Jan 2022 15:08:47 -0800 (PST) Received: from localhost ([2620:15c:202:201:723d:38a9:9e7f:3435]) by smtp.gmail.com with UTF8SMTPSA id z124sm6396253pfb.166.2022.01.27.15.08.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 27 Jan 2022 15:08:47 -0800 (PST) From: Brian Norris To: MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Rob Herring Cc: linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Lin Huang , linux-arm-kernel@lists.infradead.org, Derek Basehore , devicetree@vger.kernel.org, linux-pm@vger.kernel.org, Heiko Stuebner , Enric Balletbo i Serra , =?utf-8?q?Ga=C3=ABl_?= =?utf-8?q?PORTAY?= , Daniel Lezcano , Brian Norris Subject: [PATCH v2 12/15] arm64: dts: rockchip: Enable dmc and dfi nodes on gru Date: Thu, 27 Jan 2022 15:07:23 -0800 Message-Id: <20220127150615.v2.12.I3a5c7f21ecd8221b42c2dbcd618386bce7b3e9a6@changeid> X-Mailer: git-send-email 2.35.0.rc0.227.g00780c9af4-goog In-Reply-To: <20220127230727.3369358-1-briannorris@chromium.org> References: <20220127230727.3369358-1-briannorris@chromium.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220127_150849_156530_8007237F X-CRM114-Status: GOOD ( 14.94 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org From: Lin Huang Enable the DMC (Dynamic Memory Controller) and the DFI (DDR PHY Interface) nodes on gru boards so we can support DDR DVFS. Signed-off-by: Lin Huang Signed-off-by: Enric Balletbo i Serra Signed-off-by: Gaël PORTAY Signed-off-by: Daniel Lezcano Signed-off-by: Brian Norris Updates since the old series: - reordered alphabetically by phandle name, per style - drop a ton of deprecated/unused properties - add required center-supply for scarlet - add new *_idle_dis_freq properties - drop the lowest (200 MHz) OPP; this was never stabilized for production - bump the voltage (0.9V -> 0.925V) for the highest OPP on Chromebook models; later (tablet) models were more stable, with a fixed DDR regulator - bump odt_dis_freq to 666 MHz; early versions used 333 MHz, but stabilization efforts landed on 666 MHz for production --- Changes in v2: - Adapt to new properties Changes in v1: This was part of a previous series, at: https://lore.kernel.org/r/20210308233858.24741-3-daniel.lezcano@linaro.org I've picked up a bunch of changes and fixes, so I've restarted the patch series numbering. .../dts/rockchip/rk3399-gru-chromebook.dtsi | 7 +++++ .../boot/dts/rockchip/rk3399-gru-scarlet.dtsi | 12 ++++++++ arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 28 +++++++++++++++++++ .../boot/dts/rockchip/rk3399-op1-opp.dtsi | 25 +++++++++++++++++ 4 files changed, 72 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi index 9b2c679f5eca..cc8950046d94 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi @@ -234,6 +234,13 @@ &cdn_dp { extcon = <&usbc_extcon0>, <&usbc_extcon1>; }; +&dmc { + center-supply = <&ppvar_centerlogic>; + rockchip,pd-idle-dis-freq-hz = <800000000>; + rockchip,sr-idle-dis-freq-hz = <800000000>; + rockchip,sr-mc-gate-idle-dis-freq-hz = <800000000>; +}; + &edp { status = "okay"; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi index a9817b3d7edc..913d845eb51a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi @@ -391,6 +391,18 @@ &cru { <400000000>; }; +/* The center supply is fixed to .9V on scarlet */ +&dmc { + center-supply = <&pp900_s0>; +}; + +/* We don't need .925 V for 928 MHz on scarlet */ +&dmc_opp_table { + opp03 { + opp-microvolt = <900000>; + }; +}; + &gpio0 { gpio-line-names = /* GPIO0 A 0-7 */ "CLK_32K_AP", diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi index 162f08bca0d4..23bfba86daab 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi @@ -373,6 +373,34 @@ &cru { <200000000>; }; +&dfi { + status = "okay"; +}; + +&dmc { + status = "okay"; + + rockchip,pd-idle-ns = <160>; + rockchip,sr-idle-ns = <10240>; + rockchip,sr-mc-gate-idle-ns = <40960>; + rockchip,srpd-lite-idle-ns = <61440>; + rockchip,standby-idle-ns = <81920>; + + rockchip,ddr3_odt_dis_freq = <666000000>; + rockchip,lpddr3_odt_dis_freq = <666000000>; + rockchip,lpddr4_odt_dis_freq = <666000000>; + + rockchip,sr-mc-gate-idle-dis-freq-hz = <1000000000>; + rockchip,srpd-lite-idle-dis-freq-hz = <0>; + rockchip,standby-idle-dis-freq-hz = <928000000>; +}; + +&dmc_opp_table { + opp03 { + opp-suspend; + }; +}; + &emmc_phy { status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-op1-opp.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-op1-opp.dtsi index 2180e0f75003..6e29e74f6fc6 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-op1-opp.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-op1-opp.dtsi @@ -110,6 +110,27 @@ opp05 { opp-microvolt = <1075000>; }; }; + + dmc_opp_table: dmc_opp_table { + compatible = "operating-points-v2"; + + opp00 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <900000>; + }; + opp01 { + opp-hz = /bits/ 64 <666000000>; + opp-microvolt = <900000>; + }; + opp02 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <900000>; + }; + opp03 { + opp-hz = /bits/ 64 <928000000>; + opp-microvolt = <925000>; + }; + }; }; &cpu_l0 { @@ -136,6 +157,10 @@ &cpu_b1 { operating-points-v2 = <&cluster1_opp>; }; +&dmc { + operating-points-v2 = <&dmc_opp_table>; +}; + &gpu { operating-points-v2 = <&gpu_opp_table>; };