diff mbox series

[v2] arm64: dts: rockchip: enable otg/drd operation of usb_host0_xhci in rk3568

Message ID 20220502064551.202613-1-michael.riesch@wolfvision.net (mailing list archive)
State New
Headers show
Series [v2] arm64: dts: rockchip: enable otg/drd operation of usb_host0_xhci in rk3568 | expand

Commit Message

Michael Riesch May 2, 2022, 6:45 a.m. UTC
This USB 3.0 controller of the Rockchip RK3568 is capable of OTG/DRD
operation. Enable it in the device tree.

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
---
v2:
 - As pointed out by Nicolas, this is RK3568 specific. Moved change to
   rk3568.dtsi.

 arch/arm64/boot/dts/rockchip/rk3568.dtsi | 1 +
 1 file changed, 1 insertion(+)

--
2.30.2

Comments

Peter Geis May 2, 2022, 9:54 a.m. UTC | #1
On Mon, May 2, 2022 at 2:46 AM Michael Riesch
<michael.riesch@wolfvision.net> wrote:
>
> This USB 3.0 controller of the Rockchip RK3568 is capable of OTG/DRD
> operation. Enable it in the device tree.

I think I missed a conversation here, the xhci0 controller is the otg
port for both rk3566 and rk3568. The only difference is on rk3566 it
is a usb2 only controller, where on rk3568 it is also a usb3
controller. It was set to host only because my original phy patches
didn't support otg mode. Since then Samuel's series fixed that.

Your original patch was correct.

Always,
Peter

>
> Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
> ---
> v2:
>  - As pointed out by Nicolas, this is RK3568 specific. Moved change to
>    rk3568.dtsi.
>
>  arch/arm64/boot/dts/rockchip/rk3568.dtsi | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
> index 5eafddf62edc..bbfe8f3d68b7 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
> @@ -134,6 +134,7 @@ power-domain@RK3568_PD_PIPE {
>  };
>
>  &usb_host0_xhci {
> +       dr_mode = "otg";
>         phys = <&usb2phy0_otg>, <&combphy0 PHY_TYPE_USB3>;
>         phy-names = "usb2-phy", "usb3-phy";
>  };
> --
> 2.30.2
Michael Riesch May 9, 2022, 9:49 a.m. UTC | #2
Hello Peter,

On 5/2/22 11:54, Peter Geis wrote:
> On Mon, May 2, 2022 at 2:46 AM Michael Riesch
> <michael.riesch@wolfvision.net> wrote:
>>
>> This USB 3.0 controller of the Rockchip RK3568 is capable of OTG/DRD
>> operation. Enable it in the device tree.
> 
> I think I missed a conversation here, the xhci0 controller is the otg
> port for both rk3566 and rk3568. The only difference is on rk3566 it
> is a usb2 only controller, where on rk3568 it is also a usb3
> controller. It was set to host only because my original phy patches
> didn't support otg mode. Since then Samuel's series fixed that.
> 
> Your original patch was correct.

I have already replied to v1, but at this point I would like to
 - thank you for pointing this out
 - and send a friendly reminder to Heiko: please apply v1 of this
   patch :-)

Thanks and best regards,
Michael

> 
> Always,
> Peter
> 
>>
>> Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
>> ---
>> v2:
>>  - As pointed out by Nicolas, this is RK3568 specific. Moved change to
>>    rk3568.dtsi.
>>
>>  arch/arm64/boot/dts/rockchip/rk3568.dtsi | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
>> index 5eafddf62edc..bbfe8f3d68b7 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
>> @@ -134,6 +134,7 @@ power-domain@RK3568_PD_PIPE {
>>  };
>>
>>  &usb_host0_xhci {
>> +       dr_mode = "otg";
>>         phys = <&usb2phy0_otg>, <&combphy0 PHY_TYPE_USB3>;
>>         phy-names = "usb2-phy", "usb3-phy";
>>  };
>> --
>> 2.30.2
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
index 5eafddf62edc..bbfe8f3d68b7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
@@ -134,6 +134,7 @@  power-domain@RK3568_PD_PIPE {
 };

 &usb_host0_xhci {
+	dr_mode = "otg";
 	phys = <&usb2phy0_otg>, <&combphy0 PHY_TYPE_USB3>;
 	phy-names = "usb2-phy", "usb3-phy";
 };