| Message ID | 20220705085420.272912-17-benjamin.gaignard@collabora.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Move HEVC stateless controls out of staging | expand |
On Tue, Jul 05, 2022 at 10:54:19AM +0200, Benjamin Gaignard wrote: > 'F.7.3.6.1 General slice segment header syntax' section of HEVC > specification describes that a slice header always end aligned on > byte boundary, therefore we only need to provide the data offset in bytes. > > Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com> > Acked-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> > Tested-by: Jernej Skrabec <jernej.skrabec@gmail.com> Makes sense and it matches what other CODEC ABIs. Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Thanks, Ezequiel > --- > .../media/v4l/ext-ctrls-codec.rst | 4 ++-- > .../staging/media/sunxi/cedrus/cedrus_h265.c | 19 ++++++++++++++++++- > .../staging/media/sunxi/cedrus/cedrus_video.c | 1 - > include/media/hevc-ctrls.h | 4 ++-- > 4 files changed, 22 insertions(+), 6 deletions(-) > > diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst > index 889e2bcffde6..af5cb4e4ef73 100644 > --- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst > +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst > @@ -3008,8 +3008,8 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - > - ``bit_size`` > - Size (in bits) of the current slice data. > * - __u32 > - - ``data_bit_offset`` > - - Offset (in bits) to the video data in the current slice data. > + - ``data_byte_offset`` > + - Offset (in bytes) to the video data in the current slice data. > * - __u32 > - ``num_entry_point_offsets`` > - Specifies the number of entry point offset syntax elements in the slice header. > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > index 411601975124..7b67cb4621cf 100644 > --- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > @@ -317,6 +317,8 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, > u32 chroma_log2_weight_denom; > u32 output_pic_list_index; > u32 pic_order_cnt[2]; > + u8 *padding; > + int count; > u32 reg; > > sps = run->h265.sps; > @@ -405,7 +407,22 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, > /* Initialize bitstream access. */ > cedrus_write(dev, VE_DEC_H265_TRIGGER, VE_DEC_H265_TRIGGER_INIT_SWDEC); > > - cedrus_h265_skip_bits(dev, slice_params->data_bit_offset); > + /* > + * Cedrus expects that bitstream pointer is actually at the end of the slice header > + * instead of start of slice data. Padding is 8 bits at most (one bit set to 1 and > + * at most seven bits set to 0), so we have to inspect only one byte before slice data. > + */ > + padding = (u8 *)vb2_plane_vaddr(&run->src->vb2_buf, 0) + > + slice_params->data_byte_offset - 1; > + > + for (count = 0; count < 8; count++) > + if (*padding & (1 << count)) > + break; > + > + /* Include the one bit. */ > + count++; > + > + cedrus_h265_skip_bits(dev, slice_params->data_byte_offset * 8 - count); > > /* Bitstream parameters. */ > > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_video.c b/drivers/staging/media/sunxi/cedrus/cedrus_video.c > index 33726175d980..66714609b577 100644 > --- a/drivers/staging/media/sunxi/cedrus/cedrus_video.c > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_video.c > @@ -568,7 +568,6 @@ int cedrus_queue_init(void *priv, struct vb2_queue *src_vq, > > src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT; > src_vq->io_modes = VB2_MMAP | VB2_DMABUF; > - src_vq->dma_attrs = DMA_ATTR_NO_KERNEL_MAPPING; > src_vq->drv_priv = ctx; > src_vq->buf_struct_size = sizeof(struct cedrus_buffer); > src_vq->ops = &cedrus_qops; > diff --git a/include/media/hevc-ctrls.h b/include/media/hevc-ctrls.h > index 7358cbfc3e4d..c89029b3c5da 100644 > --- a/include/media/hevc-ctrls.h > +++ b/include/media/hevc-ctrls.h > @@ -310,7 +310,7 @@ struct v4l2_hevc_pred_weight_table { > * V4L2_CTRL_FLAG_DYNAMIC_ARRAY flag must be set when using it. > * > * @bit_size: size (in bits) of the current slice data > - * @data_bit_offset: offset (in bits) to the video data in the current slice data > + * @data_byte_offset: offset (in bytes) to the video data in the current slice data > * @num_entry_point_offsets: specifies the number of entry point offset syntax > * elements in the slice header. > * @nal_unit_type: specifies the coding type of the slice (B, P or I) > @@ -356,7 +356,7 @@ struct v4l2_hevc_pred_weight_table { > */ > struct v4l2_ctrl_hevc_slice_params { > __u32 bit_size; > - __u32 data_bit_offset; > + __u32 data_byte_offset; > __u32 num_entry_point_offsets; > /* ISO/IEC 23008-2, ITU-T Rec. H.265: NAL unit header */ > __u8 nal_unit_type; > -- > 2.32.0 >
diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst index 889e2bcffde6..af5cb4e4ef73 100644 --- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst @@ -3008,8 +3008,8 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - - ``bit_size`` - Size (in bits) of the current slice data. * - __u32 - - ``data_bit_offset`` - - Offset (in bits) to the video data in the current slice data. + - ``data_byte_offset`` + - Offset (in bytes) to the video data in the current slice data. * - __u32 - ``num_entry_point_offsets`` - Specifies the number of entry point offset syntax elements in the slice header. diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c index 411601975124..7b67cb4621cf 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c @@ -317,6 +317,8 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, u32 chroma_log2_weight_denom; u32 output_pic_list_index; u32 pic_order_cnt[2]; + u8 *padding; + int count; u32 reg; sps = run->h265.sps; @@ -405,7 +407,22 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, /* Initialize bitstream access. */ cedrus_write(dev, VE_DEC_H265_TRIGGER, VE_DEC_H265_TRIGGER_INIT_SWDEC); - cedrus_h265_skip_bits(dev, slice_params->data_bit_offset); + /* + * Cedrus expects that bitstream pointer is actually at the end of the slice header + * instead of start of slice data. Padding is 8 bits at most (one bit set to 1 and + * at most seven bits set to 0), so we have to inspect only one byte before slice data. + */ + padding = (u8 *)vb2_plane_vaddr(&run->src->vb2_buf, 0) + + slice_params->data_byte_offset - 1; + + for (count = 0; count < 8; count++) + if (*padding & (1 << count)) + break; + + /* Include the one bit. */ + count++; + + cedrus_h265_skip_bits(dev, slice_params->data_byte_offset * 8 - count); /* Bitstream parameters. */ diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_video.c b/drivers/staging/media/sunxi/cedrus/cedrus_video.c index 33726175d980..66714609b577 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_video.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_video.c @@ -568,7 +568,6 @@ int cedrus_queue_init(void *priv, struct vb2_queue *src_vq, src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT; src_vq->io_modes = VB2_MMAP | VB2_DMABUF; - src_vq->dma_attrs = DMA_ATTR_NO_KERNEL_MAPPING; src_vq->drv_priv = ctx; src_vq->buf_struct_size = sizeof(struct cedrus_buffer); src_vq->ops = &cedrus_qops; diff --git a/include/media/hevc-ctrls.h b/include/media/hevc-ctrls.h index 7358cbfc3e4d..c89029b3c5da 100644 --- a/include/media/hevc-ctrls.h +++ b/include/media/hevc-ctrls.h @@ -310,7 +310,7 @@ struct v4l2_hevc_pred_weight_table { * V4L2_CTRL_FLAG_DYNAMIC_ARRAY flag must be set when using it. * * @bit_size: size (in bits) of the current slice data - * @data_bit_offset: offset (in bits) to the video data in the current slice data + * @data_byte_offset: offset (in bytes) to the video data in the current slice data * @num_entry_point_offsets: specifies the number of entry point offset syntax * elements in the slice header. * @nal_unit_type: specifies the coding type of the slice (B, P or I) @@ -356,7 +356,7 @@ struct v4l2_hevc_pred_weight_table { */ struct v4l2_ctrl_hevc_slice_params { __u32 bit_size; - __u32 data_bit_offset; + __u32 data_byte_offset; __u32 num_entry_point_offsets; /* ISO/IEC 23008-2, ITU-T Rec. H.265: NAL unit header */ __u8 nal_unit_type;