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Wed, 23 Nov 2022 10:33:22 -0800 (PST) Received: from localhost.localdomain ([2405:201:c00a:a809:a055:fcc4:4677:827]) by smtp.gmail.com with ESMTPSA id x3-20020aa79403000000b0056d2317455bsm13006732pfo.7.2022.11.23.10.33.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Nov 2022 10:33:21 -0800 (PST) From: Jagan Teki To: Heiko Stuebner , Rob Herring , Krzysztof Kozlowski Cc: Daniel Lezcano , linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, Johan Jonker , Jagan Teki Subject: [PATCH v8 8/8] ARM: dts: rockchip: rv1126: Add Edgeble Neural Compute Module 2(Neu2) IO Date: Thu, 24 Nov 2022 00:01:24 +0530 Message-Id: <20221123183124.6911-9-jagan@edgeble.ai> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221123183124.6911-1-jagan@edgeble.ai> References: <20221123183124.6911-1-jagan@edgeble.ai> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221123_103324_925924_B4CBB820 X-CRM114-Status: GOOD ( 15.09 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Neural Compute Module 2(Neu2) IO board is an industrial form factor evaluation board from Edgeble AI. General features: - microSD slot - MIPI DSI connector - 2x USB Host - 1x USB OTG - Ethernet - mini PCIe - Onboard PoE - RS485, RS232, CAN - Micro Phone array - Speaker - RTC battery slot - 40-pin expansion Neu2 needs to mount on top of this IO board in order to create complete Edgeble Neural Compute Module 2(Neu2) IO platform. Add support for it. Signed-off-by: Jagan Teki --- Changes for v8, v7: - none Changes for v6: - update the carrier name. arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/rv1126-edgeble-neu2-io.dts | 38 ++++++++++++++++++++ 2 files changed, 39 insertions(+) create mode 100644 arch/arm/boot/dts/rv1126-edgeble-neu2-io.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index e48cfbc4e8e4..40cc34bd4945 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1122,6 +1122,7 @@ dtb-$(CONFIG_ARCH_RENESAS) += \ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rv1108-elgin-r1.dtb \ rv1108-evb.dtb \ + rv1126-edgeble-neu2-io.dtb \ rk3036-evb.dtb \ rk3036-kylin.dtb \ rk3066a-bqcurie2.dtb \ diff --git a/arch/arm/boot/dts/rv1126-edgeble-neu2-io.dts b/arch/arm/boot/dts/rv1126-edgeble-neu2-io.dts new file mode 100644 index 000000000000..ae1cf344239b --- /dev/null +++ b/arch/arm/boot/dts/rv1126-edgeble-neu2-io.dts @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 Rockchip Electronics Co., Ltd. + * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd. + */ + +/dts-v1/; +#include "rv1126.dtsi" +#include "rv1126-edgeble-neu2.dtsi" + +/ { + model = "Edgeble Neu2 IO Board"; + compatible = "edgeble,neural-compute-module-2-io", + "edgeble,neural-compute-module-2", "rockchip,rv1126"; + + chosen { + stdout-path = "serial2:1500000n8"; + }; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + card-detect-delay = <200>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_bus4 &sdmmc0_det>; + rockchip,default-sample-phase = <90>; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr104; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +&uart2 { + status = "okay"; +};