From patchwork Fri Feb 3 12:50:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sascha Hauer X-Patchwork-Id: 13127460 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3AE1AC61DA4 for ; Fri, 3 Feb 2023 12:54:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Eo7YCpqOULCcQyh4kAeRJLG3S/HTGyXgvhV43u3t7bU=; b=GbLM5N4mQMXJVw dc7aJJ1PtENw6iGFw29hzgH+EGE8QqgbKdinrRHmGyKwpF1W/z1rVkeX9kemdq5HJ+qQSbI5tz7xU jM8Qyki5qqaGcOCmMbI5YRLFds79+fVDmycRbXyMMJyh8WRaE6oDrO29jRfihCemWbjlVVfmoEOl8 f09lrRKnRzDAlxkXE4b/T8Bzeqy+axH8AP8i+5gwRRXCe0grh4kT2sD1LnEcNnWRGZ/Tey8NDud8O 6zxoStfS7U7nP4rzQI0FCBrg4NyYsv385g9eW+j8xynSQRQj9AzscvdLI8akZXs215E0aQMmot0Pa yHjWOxqJ+EaM+4Rzm84w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pNvZr-001rwt-UX; Fri, 03 Feb 2023 12:54:03 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pNvWN-001pxT-JP for linux-rockchip@lists.infradead.org; Fri, 03 Feb 2023 12:50:31 +0000 Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1pNvWE-0000ao-5I; Fri, 03 Feb 2023 13:50:18 +0100 Received: from [2a0a:edc0:0:1101:1d::28] (helo=dude02.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1pNvWA-002Opb-M6; Fri, 03 Feb 2023 13:50:15 +0100 Received: from sha by dude02.red.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1pNvW9-000Zl5-VL; Fri, 03 Feb 2023 13:50:13 +0100 From: Sascha Hauer To: linux-pm@vger.kernel.org Cc: linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Heiko Stuebner , Kyungmin Park , MyungJoo Ham , Will Deacon , Mark Rutland , kernel@pegutronix.de, Michael Riesch , Sascha Hauer Subject: [PATCH 06/18] PM / devfreq: rockchip-dfi: Use free running counter Date: Fri, 3 Feb 2023 13:50:00 +0100 Message-Id: <20230203125012.3804008-7-s.hauer@pengutronix.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230203125012.3804008-1-s.hauer@pengutronix.de> References: <20230203125012.3804008-1-s.hauer@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: sha@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-rockchip@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230203_045027_698320_C24BFAF9 X-CRM114-Status: GOOD ( 20.77 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org The DDR_MON counters are free running counters. These are resetted to 0 when starting them over like currently done when reading the current counter values. Resetting the counters becomes a problem with perf support we want to add later, because perf needs a monotonicly increasing counter. This patch removes resetting the counters and keeps them running instead. Counter overflows are handled with modular arithmetics. Not stopping the counters also has the impact that they are running while we are reading them. We cannot read multiple timers atomically, so the values do not exactly fit together. The effect should be negligible though as the time between two measurements is some orders of magnitude bigger than the time we need to read multiple registers. Signed-off-by: Sascha Hauer --- drivers/devfreq/event/rockchip-dfi.c | 53 ++++++++++++++++------------ 1 file changed, 31 insertions(+), 22 deletions(-) diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c index 383fe8a17a512..25d64d9166a9a 100644 --- a/drivers/devfreq/event/rockchip-dfi.c +++ b/drivers/devfreq/event/rockchip-dfi.c @@ -38,11 +38,15 @@ #define DDRMON_CH1_COUNT_NUM 0x3c #define DDRMON_CH1_DFI_ACCESS_NUM 0x40 -struct dmc_usage { +struct dmc_count_channel { u32 access; u32 total; }; +struct dmc_count { + struct dmc_count_channel c[RK3399_DMC_NUM_CH]; +}; + /* * The dfi controller can monitor DDR load. It has an upper and lower threshold * for the operating points. Whenever the usage leaves these bounds an event is @@ -51,7 +55,8 @@ struct dmc_usage { struct rockchip_dfi { struct devfreq_event_dev *edev; struct devfreq_event_desc desc; - struct dmc_usage ch_usage[RK3399_DMC_NUM_CH]; + struct dmc_count count; + struct dmc_count last_event_count; struct device *dev; void __iomem *regs; struct regmap *regmap_pmu; @@ -85,30 +90,18 @@ static void rockchip_dfi_stop_hardware_counter(struct devfreq_event_dev *edev) writel_relaxed(SOFTWARE_DIS, dfi_regs + DDRMON_CTRL); } -static int rockchip_dfi_get_busier_ch(struct devfreq_event_dev *edev) +static void rockchip_dfi_read_counters(struct devfreq_event_dev *edev, struct dmc_count *count) { struct rockchip_dfi *dfi = devfreq_event_get_drvdata(edev); - u32 tmp, max = 0; - u32 i, busier_ch = 0; + u32 i; void __iomem *dfi_regs = dfi->regs; - rockchip_dfi_stop_hardware_counter(edev); - - /* Find out which channel is busier */ for (i = 0; i < RK3399_DMC_NUM_CH; i++) { - dfi->ch_usage[i].access = readl_relaxed(dfi_regs + + count->c[i].access = readl_relaxed(dfi_regs + DDRMON_CH0_DFI_ACCESS_NUM + i * 20); - dfi->ch_usage[i].total = readl_relaxed(dfi_regs + + count->c[i].total = readl_relaxed(dfi_regs + DDRMON_CH0_COUNT_NUM + i * 20); - tmp = dfi->ch_usage[i].access; - if (tmp > max) { - busier_ch = i; - max = tmp; - } } - rockchip_dfi_start_hardware_counter(edev); - - return busier_ch; } static int rockchip_dfi_disable(struct devfreq_event_dev *edev) @@ -145,12 +138,28 @@ static int rockchip_dfi_get_event(struct devfreq_event_dev *edev, struct devfreq_event_data *edata) { struct rockchip_dfi *dfi = devfreq_event_get_drvdata(edev); - int busier_ch; + struct dmc_count count; + struct dmc_count *last = &dfi->last_event_count; + u32 access = 0, total = 0; + int i; + + rockchip_dfi_read_counters(edev, &count); + + /* We can only report one channel, so find the busiest one */ + for (i = 0; i < RK3399_DMC_NUM_CH; i++) { + u32 a = count.c[i].access - last->c[i].access; + u32 t = count.c[i].total - last->c[i].total; + + if (a > access) { + access = a; + total = t; + } + } - busier_ch = rockchip_dfi_get_busier_ch(edev); + edata->load_count = access * 4; + edata->total_count = total; - edata->load_count = dfi->ch_usage[busier_ch].access * 4; - edata->total_count = dfi->ch_usage[busier_ch].total; + dfi->last_event_count = count; return 0; }