| Message ID | 20230321215624.78383-5-cristian.ciocaltea@collabora.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Enable I2S support for RK3588/RK3588S SoCs | expand |
Dne torek, 21. marec 2023 ob 22:56:18 CEST je Cristian Ciocaltea napisal(a): > Commit 370f696e4474 ("dt-bindings: serial: snps-dw-apb-uart: add dma & > dma-names properties") documented dma-names property to handle Allwinner > D1 dtbs_check warnings, but relies on the rx->tx ordering, which is the > reverse of what a bunch of different boards expect. > > The initial proposed solution was to allow a flexible dma-names order in > the binding, due to potential ABI breakage concerns after fixing the DTS > files. But luckily the Allwinner boards are not affected, since they are > using a shared DMA channel for rx and tx. > > Hence, the first step in fixing the inconsistency was to change > dma-names order in the binding to tx->rx. > > Do the same for the snps,dw-apb-uart nodes in the DTS file. > > Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> > --- Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Best regards, Jernej > arch/arm/boot/dts/sun8i-v3s.dtsi | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi > b/arch/arm/boot/dts/sun8i-v3s.dtsi index db194c606fdc..b001251644f7 100644 > --- a/arch/arm/boot/dts/sun8i-v3s.dtsi > +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi > @@ -479,7 +479,7 @@ uart0: serial@1c28000 { > reg-io-width = <4>; > clocks = <&ccu CLK_BUS_UART0>; > dmas = <&dma 6>, <&dma 6>; > - dma-names = "rx", "tx"; > + dma-names = "tx", "rx"; > resets = <&ccu RST_BUS_UART0>; > status = "disabled"; > }; > @@ -492,7 +492,7 @@ uart1: serial@1c28400 { > reg-io-width = <4>; > clocks = <&ccu CLK_BUS_UART1>; > dmas = <&dma 7>, <&dma 7>; > - dma-names = "rx", "tx"; > + dma-names = "tx", "rx"; > resets = <&ccu RST_BUS_UART1>; > status = "disabled"; > }; > @@ -505,7 +505,7 @@ uart2: serial@1c28800 { > reg-io-width = <4>; > clocks = <&ccu CLK_BUS_UART2>; > dmas = <&dma 8>, <&dma 8>; > - dma-names = "rx", "tx"; > + dma-names = "tx", "rx"; > resets = <&ccu RST_BUS_UART2>; > pinctrl-0 = <&uart2_pins>; > pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index db194c606fdc..b001251644f7 100644 --- a/arch/arm/boot/dts/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi @@ -479,7 +479,7 @@ uart0: serial@1c28000 { reg-io-width = <4>; clocks = <&ccu CLK_BUS_UART0>; dmas = <&dma 6>, <&dma 6>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; resets = <&ccu RST_BUS_UART0>; status = "disabled"; }; @@ -492,7 +492,7 @@ uart1: serial@1c28400 { reg-io-width = <4>; clocks = <&ccu CLK_BUS_UART1>; dmas = <&dma 7>, <&dma 7>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; resets = <&ccu RST_BUS_UART1>; status = "disabled"; }; @@ -505,7 +505,7 @@ uart2: serial@1c28800 { reg-io-width = <4>; clocks = <&ccu CLK_BUS_UART2>; dmas = <&dma 8>, <&dma 8>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; resets = <&ccu RST_BUS_UART2>; pinctrl-0 = <&uart2_pins>; pinctrl-names = "default";
Commit 370f696e4474 ("dt-bindings: serial: snps-dw-apb-uart: add dma & dma-names properties") documented dma-names property to handle Allwinner D1 dtbs_check warnings, but relies on the rx->tx ordering, which is the reverse of what a bunch of different boards expect. The initial proposed solution was to allow a flexible dma-names order in the binding, due to potential ABI breakage concerns after fixing the DTS files. But luckily the Allwinner boards are not affected, since they are using a shared DMA channel for rx and tx. Hence, the first step in fixing the inconsistency was to change dma-names order in the binding to tx->rx. Do the same for the snps,dw-apb-uart nodes in the DTS file. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> --- arch/arm/boot/dts/sun8i-v3s.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)